Opto-IC/Board

1
Opto-IC/Board
WBS 1.1.1.3 4

• K.K. Gan
• The Ohio State University

July 9, 2003
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Outline
l Introduction l VDC/DORIC l Opto-board l
Cost and schedule summary l Conclusions
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ATLAS Pixel Opto-link
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OSU Responsibilities
l VDC and DORIC P design P testing of 50
of final production l Opto-board P design
and fabrication P testing of 50 of final
production?
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OSU ATLAS Personnel
l Faculty K.K. Gan, Harris Kagan, Richard
Kass l Research Associates Amir Rahimi, Mike
Zoeller l Graduate Students Kregg Arms,
Rouben Ter-Antonian l Engineers Mark Johnson,
Chuck Rush l Technicians Jim Burns, Jason
Moore, Shane Smith, Bob Wells
new
new
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Status of VDC/DORIC
l VDC convert LVDS signal into single-end
signal to drive VCSEL l DORIC extract clock
and command signal from bi-phase mark encoded
signal received at PIN l five IBM prototype
runs with various improvements and changes in
response to opto-pack evolution u four MPW runs
plus one with FE/MCC-I1 l VDC/DORIC-I5e were
submitted with MCC-I2 as engineering run u
convert from 3-metal MPW layout to 5-metal
layout u minor improvements in
DORIC-I5e P this will be production run if
performance is satisfactory
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VDC-I5e Bright and Dim Currents vs. Iset
VDC-I5e
VDC-I5
high power oxide VCSEL
l bright current is similar to I5 l dim current
is similar to I5 and close to target 1 mA l
rise/fall times, duty cycle, current consumption
within specs
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VCSEL Opto-pack Evolution
l started with 1-channel VCSEL l adapted
8-channel p VCSEL to use with MT connector l
converted to oxide VCSEL because p has been
discontinued by Truelight l converted to
high-power oxide VCSEL because normal oxide has
been discontinued by Truelight
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I-V Curves/Optical Power ofP, Normal High
Power Oxide VCSELs
high power oxide (3 arrays)
normal oxide
high power oxide (2 arrays)
p
l p/oxide VCSELs have similar optical power in
operating range (10-20 mA) l oxide VCSELs have
larger effective serial resistance smaller
VCSEL current when driven by VDC
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I-V Curve of High Power Oxide VCSELs
p with 10 W
high power oxide
normal oxide
high power oxide
l some VCSEL arrays contain a channel with much
larger effective serial resistance maximum
VCSEL current of 10 mA when driven by
VDC significantly below target of 20 mA
annealing current
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High Power Oxide VCSEL with Negative Common
Cathode
20 mA Vc _at_ -0.2 V
other links _at_ 80 mA
10 mA Vc _at_ gnd
other links off
l some links have twice as worse PIN current
thresholds for no bit errors l measured with all
clocks running asynchronically
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DORIC-I5e PIN Current Thresholds for No Bit
Errors
l PIN current thresholds for no bit errors
measured with 44-pin packages l thresholds are
low and similar to DORIC-I5 expect lower
thresholds on opto-board as DORIC-I5 l upper
thresholds gt 1200 mA l successfully converted
reset from active high to low
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VDC/DORIC/Opto-board Quality Assurance
l control circuit boards designed/built/tested l
LabView programs written/tested l VDC/DORIC
QA plan n currently use packaged chips to
exercise QA system n have received probe
cards perform QA with probe station l
opto-board QA plan n perform QA in
temperature controlled chamber QA system
almost ready for production
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Opto-Board
l converts optical signal ? electrical
signal l contains 6-7 optical links P layers
1 and 2 optical link u 2 DORICs, 2 VDCs,
PIN/VCSEL (opto-pack) P B layer optical
link u 2 DORICs, 4 VDCs, PIN/2 VCSEL
(opto-pack) l use BeO for heat management but
prototype initially in FR-4 for fast turnaround
and cost saving u have four FR-4 prototype runs
to accommodate various design changes in
chips/opto-packs
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Status of BeO Opto-board
l First batch n 30 boards delivered in
April n several open vias on each board due to
insufficient gold filling repair with
wire-wrap wires
VDC-I5
opto-pack
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PIN Current Thresholds for No Bit Errors
l low PIN current thresholds for no bit
errors independent of activity in adjacent
channels no design errors
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Status of BeO Opto-board
l Second batch n 31 boards delivered in
June n vias overfilled and excess metal ground
away no open vias n 17 boards have shorts
between power and ground lines n attempt to
populate a second BeO board u opto-pack
housing fits well u one DORIC mounted
backward u no visible damage to adjacent chip
after replacement u board failed to work
replaced both DORICs opto-board now works!
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BeO Opto-board from 2nd Batch
Ambient 22.5 oC
34.7 oC
36.4 oC
housing
VDC
opto-pack
DORIC
latch broken
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PIN Current Thresholds for No Bit Errors
OSU
1st batch
2nd batch
l both opto-boards have low PIN current
thresholds for no bit errors independent of
activity in adjacent channels u will produce
opto-boards with second vendor
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Opto-Link Proton Irradiations
l four 24-GeV proton irradiations at CERN in
last three years P OSU designed and fabricated
all test systems u cold box electrical
test of DORIC/VDC u shuttle test of
opto-link on opto-boards
fibers
opto-board
BER tester
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VDC-I4 Clock Duty Cycle vs. Dosage
l duty cycle increases by 2 after 58 Mrad
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Opto-Board Bit Error Threshold vs. Dosage
Dosage/VCSEL Annealing Time
l VCSELs annealed with 20 mA during indicated
periods l PIN current thresholds for no bit
errors remain constant up to 21 Mrad
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Proton Irradiation Summary and Plan

• l opto-link with DORIC/VDC-I3 and p VCSEL
  opto-pack meets radiation specs
• l August 2003 irradiation
• P double irradiation statistics
• u cold box four 4-channel DORIC/VDC
• u shuttle four opto-boards

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Changes in ETC04
l cost adjustments P BeO opto-board
prototype run with new vendor 15K P increase
cost for production BeO boards 30K P
increase cost for SMD mounting of production BeO
boards 3K P technician for opto-board
production 57K l no funds allocated in FY04
irradiation P need irradiation of random
sample of production opto-boards? l WBS 1.1.1.4
FY04 P ETC03 78K? P ETC04 78K105K
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Opto-Board Milestones
4
???
4
???
???
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Summary
l preliminary results indicate that
DORIC/VDC-I5e can be used for production
opto-boards l BeO prototype opto-board can
operate with low PIN current thresholds u no
technical problem is foreseen but first vendor is
unsatisfactory