M3: ProDiver 525

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Kavita Arora (M3-1) Lisa Gentry (M3-2) Steven
Wasik (M3-3) Karolina Werner (M3-4)
Stage 9 Mar 29 Chip Level Simulation
Design Manager Steven Beigelmacher
Overall Project Objective To design a chip for a
SCUBA diver that does real-time calculations to
warn the diver of safety concerns including
decompressions sickness and lung overexpansion.
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Status

• Schematic Verification (done)
• LVS
• PressureCalc(done)
• timetoflight (done)
• timeleft (done)
• ascensionWatch (done)
• getK (done)
• safetyWatch (done)
• maxDepth (done)
• bottomTime (done)
• Top (done)
• Spice Entire Chip (6 out of 8 modules)

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Verilog Verification (gate level)
SCENERIO diver goes 80 feet for 35 min, 40 feet
for 20 min, 0 feet for 40 min
MATLAB depthvector 80ones(1,6035)
40ones(1,6020) 0ones(1,6040) bodyvector,out
pressurecalculator(depthvector) bodyvector(603
5) ans 25.5304 bodyvector(6055) ans
28.3850 bodyvector(6095) ans 18.2900
VERILOG time 2,safetywatch
0 Test where the user will go down to 80 feet for
35 minutes, then 40 feet for 20 minutes, then 0
feet 40 minutes time
6090,safetywatch 1 time
6305,pres25,depth 80 time
9054,safetywatch 2 time
9908,pres28,depth 40 time
10272,safetywatch 1 time
12165,safetywatch 0 time
17110, pres18,depth 0
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Top Level Schematic
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Internal Routing
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Top Layout
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Summary of Design Characteristics
Final area 20315130653
Transistor Count 10110
Transistor Density 0.329820898
Aspect Ratio 1.344370861
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Why Modular Spice Simulation Strategy ?

• Due to the large no. of edge cases, this
  simulation strategy gives us greater accuracy
  than a single global vector set would
• Testing time for global testing is unfeasible
  because it takes on the order of 150 clock cycles
  to cause some outputs to change
• This is quicker and allows us to better focus our
  energies

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Spice Simulation Strategy

• Used vector sets from the verilog verification
• Tested the edge cases
• In order to decrease testing time, we brought
  lower order bits out of the modules (shows
  seconds as well as minutes, and uses fractions of
  a pressure unit)

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Bottom Time Inputs
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Bottom Time Outputs
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Get K Inputs
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Get K Outputs
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Max Depth1 Inputs
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Max Depth1 Outputs
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Max Depth2 Inputs
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Max Depth2 Outputs
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PressureCalc case X0 Y0
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PressureCalc 2nd set of inputs x0,y0
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PressureCalc outputs x0, y0
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PressureCalc 2nd set of outputs x0, y0
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PressureCalc x0 y1
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PressureCalc 2nd set of inputs - x0 y1
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PressureCalc Outputs x0, y1
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PressureCalc 2nd set of Outputs x0, y1
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PressureCalc x1, y0
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PressureCalc 2nd set of x1, y0
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PressureCalc Outputs x1,y0
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PressureCalc 2nd set of Outputs x1,y0
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PressureCalc x1,y1
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PressureCalc 2nd set of inputs x1,y1
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PressureCalc Outputs x1,y1
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PressureCalc 2nd set of Outputs x1,y1
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SafetyWatch
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Clock Speed

• Critical Path From the depth input through
  pressureCalc, then through safetywatch, and out
  to the safetywatch output signal
• Estimated Final Clock Speed 1Hz

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Critical Path Layout
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Spice glitch

• error only 1 connection at node 29318
• Correction a floating unconnected wire in the
  design

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Power Consumption

• Strategy to test power consumption test the
  effects of several different power levels on the
  module in order to find the lowest at which it
  still works.
• Also, we want to see if making any optimizations
  to the layout to decrease power consumption

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• Questions?