Silicon Strip R

1
Silicon Strip RD Activity in Korea
B.G. Cheon (Chonnam Natl Univ.) On behalf of
Korean Silicon Working Group

• Introduction
• Sensor design and simulation
• Pre-results of 1st mask performance
• Status of 2nd mask design
• Summary

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Korean silicon working group

• Generic silicon sensor RD since 2001
• Silicon charge detector for CREAM balloon
  experiment
• Started working on silicon sensor RD for Belle
  upgrade
• Looking for any application to other fields
• 7 institutions so far

Kyungpook National University Ewha Womens
University Seoul National University Korea
University Yonsei University Sungkyunkwan
University Chonnam National University
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Silicon tracker RD for ILC

• Global design layout/parameter concepts can be
  referred to other presentations in this workshop.

• Intermediate tracker
• - tracking efficiency
• - linking efficiency
• - matching efficiency
• - standalone tracker
• main tracker
• - momentum resolution
• - tracking efficiency

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DSSD sensor design
n ohmic components implanted n
p-stop SiO2 Al for readout
p junction components implanted p
1st metal SiO2 VIA 2nd metal

• Double-sided silicon strip sensor type
• Three metal process
• Implanted strips in ohmic side are orthogonal to
  the strips in juction side
• Readout strips in junction side are parallel to
  the strips of ohmic side

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DSSD sensor simulation

• Simulation package Silvaco TCAD
• ATHENA process simulation
• ATLAS device simulation
• PIN diode simulation calibrates DSSD simulation
• Structure mesh
• Implantation (Boron, Phosphorus)
• Electric potential field
• IV CV characteristics
• Response of injected photon into the DSSD

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Structure
N-type Si(100), 8.5kW, 380mm
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Implantation
N strip Phosphorus
P strip Boron
P stop Boron
Annealing 900oC, N2, 90min at P Annealing 900oC,
N2, 140min at N
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IV CV
Leakage current (I-V)
C-V
1/C2 -V
9
Photon injection into DSSD
photon wavelength 0.6mm, intensity100W/cm2
0V
-150V
Total current density
e- current density
h current density
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Wafer layout (1st mask)
Mask design package Cadence (Solaris)
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DSSD sensor parameters
List DC Type  DC Type  unit
List p side n side unit
Sensor size 55610 x 29460 (sawing line included) 55610 x 29460 (sawing line included) µm2
Wafer thickness 380 380 µm
Strip pitch interval 100 50 µm
Readout pitch interval 50 50 µm
of implanted strips 512 512
of readout strips 512 512
Strip pitch length 25600 51072 µm
Strip pitch width 9 9 µm
Readout pitch width 9 9 µm 
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Test bench _at_ clean room
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Sensor profiles
p implanted
readout strip
n implanted
p-stop in atoll
VIA in hourglass
readout pad in staggering
guard ring
n side
p side
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P-side measurement
Probe n bulk pad(ground) on n-side p-guard
ring (-) on p-side
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Total leakage current/sensor
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Total capacitance/sensor
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Specification of 2nd mask design
Multi-purpose mask sensors various test
patterns
N-side P-side
Sensors Sensors 512ch 50mm pitch 512ch 100mm pitch 2types
Test Patterns Miniature 16ch 50mm pitch 32ch 50mm pitch 64ch 50mm pitch 16ch 100mm pitch 32ch 100mm pitch 64ch 100mm pitch
Test Patterns Pixel Array n implantation 25mm 5?5 array 50mm 5?5 array 100mm 5?5 array
Test Patterns PIN Diode n implantation 1cm?1cm diode
Test Patterns SSD RD (Single Strip Detector) n implantation 100mm pitch 2 types
Test Patterns SDD RD (Silicon Drift Detector) 25mm sensor 25mm sensor surrounded by p imp. p implantation
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N-side
512ch 50mm pitch
64ch 50mm pitch
1x1cm2 PIN diode
32ch 50mm pitch
16ch 50mm pitch
For SDD RD
Pixel Array
Rear-side of SSD
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P-side
512ch 100mm pitch w/o hourglass (sensor-1)
64ch 100mm pitch
1cm PIN diode
32ch 100mm pitch
For SDD RD
16ch 100mm pitch
Pixel array
512ch 100mm pitch w/ hourglass (sensor-2)
16ch 100mm pitch SSD
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P-side (sensor-1)
Implant w/ hourglass
512ch 100mm pitch sensor

• perpendicular to metal
• designed to reduce capacitance
• not applied to VIA region

21
Test pattern Miniature

• S/N measurement of each pitch strip sensor
  after making wire bonding complete.
• Three types of sensors have been prepared.
• - 16/32/64 channels

P-side 16ch 100mm pitch Sensor

Case of wire bonding
N-side 16ch 50mm pitch sensor
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Test pattern P-side SSD
SiO2
contact
1st Metal

• P-side two metal processes
• It is needed to make it compatible
• with other p implantation.

p
SiO2
VIA
2nd Metal
16ch 100mm pitch sensor(55610 x 5560)
Metal
Metal size is larger than p implant by reducing
contact size.
p implantation
Metal size is smaller than p implant by keeping
contact size.
Metal
p implantation
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Test pattern pixel array

• Pixel size 25?25, 50?50, 100?100 (mm2)
• Each sensor array 5?5 matrix
• Readout pad option was added to make wire
  bonding easy
• during the measurement of S/N

Case of wire bonding in each diode
Case of readout pad in each diode
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Test pattern SDD

• RD pattern for Silicon Drift Detector
• Sensor size 1cm ? 1cm (guard ring included)
• N-side n(sensor) p implant except the
  sensor
• P-side p implant in total

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Summary

• DSSD sensors fab-out (20 wafers, 3
  sensors/wafer) and IV CV have been measured.
• automatic probe station wirebonder purchased
  and installed
• faster and more reliable measurement
• 2nd mask design including various test patterns
  is almost ready.
• Fabrication and measurement will be done within
  two months.
• Silicon Drift Detector RD has just been
  started.
• Irradiation test for checking sensor
  rad-hardness is being planned.
• Readout DAQ design and production are in
  progress.

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Backup sildes
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CREAM Silicon Charge Detector

• CREAM(Cosmic Ray Energetics And Mass) balloon
  exp.
• To measure energy spectrum of each elements in
  1012 1015 eV
• First mission of design, fab. and integration
  performed in Korea
• Sensor size1.1cm2 S/Ngt4 Total 1000 channels

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Electric potential
Reverse bias ( 0V -90V )
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Electric field
P_strip region(P)
N wafer region
P_strips doping concentration is higher than N
wafers. So N_bulk regions electric field is
spread out widely, but the slope of P_strip
regions field is very steep. In depletion
region, electric field is not zero.

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Electron concentration
The higher reverse bias is, the larger depletion
region is
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Recombination rate
The higher reverse bias is, the larger depletion
region is
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N-side sensor
p-stop
guard ring
pad
512ch 50mm pitch sensor
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P-side (sensor-2)
Implant w/o hourglass
512ch 100mm pitch sensor

• hard to implement hourglass
• in the mask process
• compare btw w/ and w/o hourglass

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SENS technology
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Test pattern SDD type-1

• Silicon Drift Detector RD? ?? pattern
• guard ring? ??? ?? 1cm ? 1cm
• N-side? ??? ?? ??? ???
• ??? ??? ?? ? ??? ??.

50mm?50mm n implant
100mm?100mm metal
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Implantation
N strip Phosphorus
P strip Boron
Annealing 900oC, N2, 90min at P Annealing 900oC,
N2, 140min at N
P stop Boron