EE 434 Lecture 9 - PowerPoint PPT Presentation

1 / 18
About This Presentation
Title:

EE 434 Lecture 9

Description:

Epitaxy. Polysilicon. Contacts, Interconnect and Metalization. Planarization ... Contacts not allowed to Poly on thin oxide in most processes ... – PowerPoint PPT presentation

Number of Views:21
Avg rating:3.0/5.0
Slides: 19
Provided by: ecpe4
Category:
Tags: epitaxy | lecture

less

Transcript and Presenter's Notes

Title: EE 434 Lecture 9


1
EE 434Lecture 9
  • Process Technology
  • Contacts, Interconnects, Metalization
  • Interconnect Components
  • Resistors
  • Capacitors

2
IC Fabrication Technology
  • Crystal Preparation
  • Masking
  • Photolithographic Process
  • Deposition
  • Etching
  • Diffusion
  • Oxidation
  • Epitaxy
  • Polysilicon
  • Contacts, Interconnect and Metalization
  • Planarization

3
Contacts, Interconnect and Metalization
  • Contacts usually of a fixed size
  • All etches reach bottom at about the same time
  • Multiple contacts widely used
  • Contacts not allowed to Poly on thin oxide in
    most processes
  • Dog-bone often needed for minimum-length devices

4
Contacts
B
A
A
B
Acceptable Contact
Vulnerable to pin holes
Unacceptable Contact
5
Contacts
Acceptable Contact
6
Contacts
Dog Bone Contact
Design Rule Violation
7
Contacts
Common Circuit Connection
Standard Interconnection
Buried Contact
Can save area but not allowed in many processes
8
Metalization
  • Aluminum widely used for interconnect
  • Copper finding some applications
  • Must not exceed maximum current density
  • around 1ma/u
  • Ohmic Drop must be managed
  • Parasitic Capacitances must be managed
  • Interconnects from high to low level metals
    require connections to each level of metal
  • Stacked vias permissible in some processes

9
Multiple Level Interconnects
3-rd level metal connection to n-active without
stacked vias
10
Multiple Level Interconnects
3-rd level metal connection to n-active with
stacked vias
11
Interconnects
  • Metal is preferred interconnect
  • Because conductivity is high
  • Parasitic capacitances and resistances of concern
    in all interconnects
  • Polysilicon used for short interconnects
  • Silicided to reduce resistance
  • Unsilicided when used as resistors
  • Diffusion used for short interconnects
  • Parasitic capacitances are high

12
Resistance in Interconnects
B
W
A
L
H
B
A
R
13
Resistance in Interconnects
B
W
D
L
A
H
AHW
B
D
R
? independent of geometry and characteristic of
the process
14
Resistance in Interconnects
B
W
D
L
A
H
H ltlt W and H ltlt L in most processes Interconnect
behaves as a thin film Sheet resistance often
used instead of conductivity to characterize film
RR?L / W
R??/H
15
Resistance in Interconnects
W
L
RR?L / W
The Number of Squares approach to resistance
determination in thin films
1
2
3
21
NS 21
L / W21
RR?NS
16
Resistance in Interconnects
Corners Contribute about .55 Squares
Fractional Squares Can Be Represented By Their
Fraction
The squares approach is not exact but is good
enough for calculating resistance in almost all
applications
In this example
NS12.55.713.25
RR?13.25
17
Capacitance in Interconnects
Metal 2
A3
A1
A2
A5
Metal 1
A4
Substrate
C12CD12 A5
C1SCD1S (A1A2)
C2SCD2S (A3A4)
Equivalent Circuit
18
End of Lecture 9
Write a Comment
User Comments (0)
About PowerShow.com