Tomasulos Algorithm

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Tomasulos Algorithm
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Tomasulo Organization
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Reservation Station Components

• OpOperation to perform in the unit (e.g., or
  )
• Qj, QkReservation stations producing source
  registers
• Vj, VkValue of Source operands
• Rj, RkFlags indicating when Vj, Vk are ready
• BusyIndicates reservation station and FU is
  busy
• Register result statusIndicates which
  functional unit will write each register, if one
  exists. Blank when no pending instructions that
  will write that register.

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Three Stages of Tomasulo Algorithm

• 1. Issueget instruction from FP Op Queue
• If reservation station free, the scoreboard
  issues instr sends operands (renames
  registers).
• 2. Executionoperate on operands (EX)
• When both operands ready then execute if not
  ready, watch CDB for result
• 3. Write resultfinish execution (WB)
• Write on Common Data Bus to all awaiting units
  mark reservation station available.

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Tomasulo Example Cycle 0
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Tomasulo Example Cycle 1
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Tomasulo Example Cycle 2
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Tomasulo Example Cycle 3
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Tomasulo Example Cycle 4
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Tomasulo Example Cycle 5
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Tomasulo Example Cycle 6
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Tomasulo Example Cycle 7
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Tomasulo Example Cycle 8
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Tomasulo Example Cycle 9
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Tomasulo Example Cycle 10
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Tomasulo Example Cycle 11
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Tomasulo Example Cycle 12
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Tomasulo Example Cycle 13
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Tomasulo Example Cycle 14
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Tomasulo Example Cycle 15
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Tomasulo Example Cycle 16
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Tomasulo Example Cycle 17
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Tomasulo Example Cycle 18
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Tomasulo Example Cycle 57
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Tomasulo Example Cycle 58
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Tomasulo Example Cycle 59
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Tomasulo Loop Example

• Loop LD F0 0 R1
• MULTD F4 F0 F2
• SD F4 0 R1
• SUBI R1 R1 8
• BNEZ R1 Loop
• Multiply takes 4 clocks
• Load have cache misses

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Loop Example Cycle 0
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Loop Example Cycle 1
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Loop Example Cycle 2
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Loop Example Cycle 3
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Loop Example Cycle 4
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Loop Example Cycle 5
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Loop Example Cycle 6
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Loop Example Cycle 7
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Loop Example Cycle 8
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Loop Example Cycle 9
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Loop Example Cycle 10
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Loop Example Cycle 11
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Loop Example Cycle 12
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Loop Example Cycle 13
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Loop Example Cycle 14
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Loop Example Cycle 15
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Loop Example Cycle 16
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Loop Example Cycle 17
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Loop Example Cycle 18
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Loop Example Cycle 19
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Loop Example Cycle 20
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Loop Example Cycle 21
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Tomasulo Summary

• Prevents Register as bottleneck
• Avoids WAR, WAW hazards of Scoreboard
• Allows loop unrolling in HW
• Not limited to basic blocks (provided branch
  prediction)
• Lasting Contributions
• Dynamic scheduling
• Register renaming
• Load/store disambiguation
• Next More branch prediction