Back-plane Output

1
Back-plane Output
Front-panel Output
CPLD
Front-panel Inputs
VME Writable Signals
ClkIn
ClkOut
BClkOut
IntClk
LClkOut
Clock Detect
ClkOn
enIntClk
enDTrig
DTrigOut
Prog. Delay
VTrig
R
1
SwTrigIn
TrigOut
BTrigOut
TrigIn
LTrigOut
enExtTrig
Trig2In
enExtTrig2
ExtVeto
S R
enExtVeto
VetoOut
LVetoOut
VVeto
ExtAbort
enExtAbort
AbortOut
VAbort
BAbortOut
Abort Logic
ExtAct
enExtAct
ActOut
VAct
ExtBeamOn
enExtBeamOn
BeamOnOut
VBeamOn
ExtCal
enExtCal
CalOut
VCal
ExtAux1
enExtAux1
Aux1Out
BAux1Out
VAux1
ExtAux2
enExtAux2
Aux2Out
VAux2
Trigger Board Functional Diagram