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Dual-Channel Architecture

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Title: Dual-Channel Architecture


1
Dual-Channel Architecture
  • Brad Traina
  • April 7, 2009

2
Memory Hierarchy
3
Physical Memory
  • Physical memory, also known as RAM, stores data
    for use by the CPU
  • There are many types of physical memory, the most
    common used today being SDRAM

4
Random Access Memory
  • Random Access Memory (RAM) stored data is to be
    accessed at random
  • Any piece of data can be returned at a constant
    time, regardless of its physical location
  • RAM is volatile, meaning all information is lost
    when the power is shut off

5
Who Invented RAM?
  • In 1966, Robert Dennard invented DRAM (dynamic
    random access memory)
  • He received a patent for his idea in 1968.

6
Computer Memory
  • A computer's memory (RAM) is a temporary storage
    area for data that needs to be accessed at high
    speeds.
  • This can help programs run more efficiently.
  • The processor can only work as fast as data can
    be passed to it from the CPU.
  • If the CPU is waiting on data from the memory, it
    is not working at its full potential. The memory
    needs to keep up with the CPU.

7
Single-Channel Memory
  • Single-Channel memory is like a funnel that feeds
    data to the processor through a single pipe
  • Data is transferred 64 bits at a time
  • This can create a bottleneck

8
Dual-Channel Memory
  • With dual-channel memory it is like having two
    funnels feeding data through two pipes
  • With two channels, data can be transferred 128
    bits at a time

9
Memory Controller
  • The memory controller manages the data flow
    between the processor and the memory
  • Data gets sent to the memory controller which
    decides whether to store it in memory or send it
    to the processor

10
Memory Controller
11
Single-Channel Memory
  • Single Channel memory can be though of as a one
    lane street.
  • Data needs to flow both in and out of memory on
    this one lane street.

12
Dual-Channel Memory
  • Dual-Channel memory doubles the maximum amount of
    data that can be transferred between the CPU and
    the memory
  • We now have a two lane road capable of sending
    and receiving data at the same time.

13
Peak Bandwidth
  • Peak bandwidth describes the maximum amount of
    data processed by memory in a given time period.
  • It is calculated by the following formula
  • Memory Speed Number of bytes transferred per
    channel Number of channels

14
Performance
  • Notice that these transfer rates are theoretical.
  • They are calculated assuming that a data transfer
    will occur each clock cycle.
  • In reality, no CPU or memory controller will be
    transferring data 100 of the time.
  • For this reason 100 theoretical performance
    increase does not translate into a 100
    performance increase of your computer.

15
Synchronous Dual-Channel
  • For the best dual-channel memory performance you
    must use identically paired memory
  • In order for memory to be considered Identical it
    must have
  • The same capacity
  • The same speed
  • The same latency
  • This setup is referred to as synchronous
    dual-channel. It is the standard when you think
    of dual-channel memory.

16
Asynchronous dual-channel
  • Asynchronous dual-channel memory is quite new,
    and provides less performance gain when compared
    to synchronous dual-channel
  • In order to use this you must have memory
  • With the same speed
  • With the same latency
  • In this case the capacity of the memory does not
    matter

17
Triple-Channel Memory
  • The new intel core i7 processor supports triple
    channel memory.
  • The memory controller is now built into the
    processor.
  • It is capable of transferring 192 bits at a time

18
End
19
Resources
  • http//en.wikipedia.org/wiki/Dual-channel_architec
    ture
  • Everything You Need to Know About Dual Channel
  • By Gabriel Torres
  • http//www.hardwaresecrets.com/article/133/1
  • http//www.devhardware.com/c/a/Memory/Dual-Channel
    /
  • Intel Dual-Channel DDR Memory Architecture White
    Paper
  • By Infineon Technologies and Kingston Technology
  • http//www.kingston.com/newtech/MKF_520DDRWhitepap
    er.pdf
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