The CPU, Part 3.

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The CPU, Part 3.

• Dr. Doug L. Hoffman
• Computer Science 330
• Spring 2002

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Implementing Control

• Finite State Machine using graphical
  representation.
• Microcode using programming representation.
• Both can be translated into logic gates, ROMs, or
  PLAs.

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Complete State Machine
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Finite State Machine Controller

• Typically implemented using conditional logic and
  a state register.
• Outputs Datapath control lines and the next
  State ID.
• Inputs Current State ID, OP Code, and any other
  signals needed to decide the next state
  transition.

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Finite State Machine Controller
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Finite State Machine Limitations

• Only really usable for simple instruction sets.
• Graphical representation cumbersome if you have
  100s of states.
• Translation to logic prone to (human) errors.

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Alternative Approach Microcode

• Treat control signal assertion as a set of
  instructions to be executed.
• Each microinstruction represents the control
  signals for a specific state.
• Each microinstruction must also specify
  sequencing what instruction to execute next.

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Microinstruction Sequencing

• Sequential increment address and execute the
  next ?instruction.
• Fetch start of next MIPS instruction.
• Dispatch conditional transition to another
  ?instruction (state).

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Microcode Controller

• Read-only (at least at run time) memory to hold
  the ?code.
• Micro-program counter register.
• Adder to increment MPC.
• Address selection logic to translate OP codes.
• Sequence control for Dispatch commands.

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Microcode Controller
Storage may be ROM or writable memory store
loaded at system initialization
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Exceptions Interrupts

• Interrupts are caused signals from outside the
  CPU. Typically used for I/O.
• Exceptions are caused by unexpected events within
  the CPU. Arithmetic overflow, unimplemented
  instructions, traps.

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Handling Exceptions

• Undefined Instructions typically causes
  transfer of control to an OS level routine.
• Arithmetic Overflow causes instruction to be
  aborted (MIPS). Need mechanism to allow program
  to trap overflow.

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Handling Exceptions
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Handling Exceptions