Asynchronous Interface Specification, Analysis and Synthesis

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Decomposition -Boolean relations -Algebraic
factorization
F
until no more progress
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Event insertion (Vanbekbergen92)
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Event insertion (Continued)

• Properties to preserve during insertion
• trace equivalence
• speed-independence
• output-persistency
• commutativity
• Signal insertion a few events insertion

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Signal insertion

• Properties to preserve
• trace equivalence
• speed-independence

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Event insertion examples
a is not persistent
a is persistent
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Signal insertion for function F
Insertion by input borders
State Graph
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z is delayed by the new signal !!!
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y-
s
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y-
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Technology mapping

• BDD-based boolean matchingMailhot 93
• Handles sequential gates and combinational
  feedbacks
• Merging small gates into larger gates introduces
  no new hazards
• No guarantee to find correct mapping(some gates
  cannot be decomposed)

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Timing optimization (I)

• If exact timing bounds are unknown, use relative
  timing assumptions
• Timing assumptions always reduce the set of
  states
• DC-set is larger
• No new logic dependencies
• Less state conflicts
• Simpler logic

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READ control in 2-input gates
DTACK-
DSr
LDS
LDTACK
D
DTACK
DSr-
D-
LDS-
LDTACK-
D
DTACK
LDS
map
csc
DSr
LDTAKE
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Adding timing assumptions (I)
LDTACK- before DSr
Sep_max(LDTACK-,DSr)lt0
D
DTACK
LDS
map
csc
DSr
LDTAKE