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XScale Microprocessor

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... found in the next generation of iPod and iPhone products because of Apple's ... (Most) All Instructions can be conditionally executed ... – PowerPoint PPT presentation

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Title: XScale Microprocessor


1
XScale Microprocessor
  • Greg Leah, Darren Stone, Rob Murdoch, Tyler
    Gates, and Leanne Ross?????

2
Overview
  • XScale microprocessors are manufactured by Intel
  • based on ARM architecture
  • Intels implementation of the 5th generation ARM
    architecture
  • consists of several distinct families IXP
    (Network Processors), IXC (Control Plane
    Processors), IOP (I/O Processors) and PXA
    (Application Processors)

3
Overview
  • they are designed to optimize low power
    consumption and high performance processing
  • used for a wide range of wireless and networking
    applications from handheld Internet devices to
    enterprise Internet infrastructure products

4
Features Summary
  • Superpipelined RISC Technology for high speed and
    ultra low power
  • Intel Media Processing Technology for efficient
    media processing
  • Power management unit gives power savings via
    idle, sleep and quick wake-up modes

5
Features Summary
  • 32 KB instruction cache 32 KB data cache keeps
    local copy of important instructions data to
    enable high performance and low power
  • 2 KB mini-data cache for frequently changing data
    streams

6
Control Plane Processors
  • IXC Family
  • used for VoIP media gateways, wireless
    infrastructure and other networking equipment

7
Network Processors
  • IXP Family
  • ranges from solutions aimed at small/medium
    office network applications to enterprise scale
    processors that can handle OC-192 (transmission
    speeds of up to 9953.28 Mbit/s) data rates
  • IXP4XX used as both a control and data plane
    processor, providing both system control and data
    processing

8
Network Processors
  • IXP2XXX devices is typically to provide control
    plane functionality only
  • control plane tasks include routing table
    updates, microengine control, and memory
    management

9
I/O Processors
  • IOP Family
  • allow computers and storage devices to transfer
    data and increase performance by offloading I/O
    functionality from the main CPU of the device

10
Application Processors
  • PXA Family
  • targeted at mobile phones and PDA devices
  • can be found in RIM Blackberry, most Pocket PCs
    and Palms
  • also used in devices such as PVPs (Portable Video
    Players), PMCs (Portable Media Centres),
    including the Creative Zen Portable Media Player,
    and industrial embedded systems

11
Application Processors
  • rumoured that XScale processors will be found in
    the next generation of iPod and iPhone products
    because of Apples recent partnership with Intel

12
Instruction Set - ARM Compatibility
  • Compatible with ARM Version 5 TE Instruction Set
  • 32-bit ARM Instructions
  • 16-bit Thumb Instruction
  • DSP Extensions

12
13
DSP Instructions
  • Digital Signal Processing Applications
  • Saturated Arithmetic
  • Values are clamped to a fixed range
  • Overflow does not wrap
  • 70 Performance Improvement for Audio DSP
    Applications

13
14
DSP Instruction Examples
  • Sample Instructions
  • QADD
  • Add 2 registers, saturate if overflow occurs

14
15
Thumb Instruction Set
  • 16-bit Instructions
  • Re-encoded subset of ARM Instruction Set.
  • Low-memory Conditions
  • Smaller Op-codes
  • Improves Code Density
  • Less Memory Usage
  • Some Performance Penalty
  • Single ARM instruction / Multiple Thumb
    Intructions

15
16
ARM Instruction Set
  • 32-bit Instructions
  • Sample 32-bit Opcode Layout

16
17
4-bit Condition Field
  • (Most) All Instructions can be conditionally
    executed
  • Depends on N, Z, C, and V bit of the Current
    Program Status Register (CPSR)

17
18
Sample ARM Code
  • ARM Assembly Code

18
19
Wireless MMX
  • Intel extension to ARM Architecture
  • SIMD Coprocessor
  • 43 New Instructions
  • Performs Parallel Operations on Multiple 64-bit
    Data Elements

19
20
MMX - SIMD Coprocessor
  • Single Instruction Multiple Data
  • Data-level Parallelism
  • Adding the same number to a large number of data
    points
  • e.g. Changing the Brightness of an Image

20
21
MMX - Example
  • WSADB Instruction
  • Sums the absolute difference of eight
    corresponding bytes into two 64-bit words

21
22
MMX - Other Example Instructions
  • Add or subtract all 8 bytes in a 64-bit register
  • WACC, WADD, WSUB
  • 64-bit Logical Operations
  • WAND, WOR, WXOR
  • Compare 8 bytes in parallel
  • WCMPEQ, WCMPGT

22
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