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Chase May 2001

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Title: Chase May 2001


1
Applications Engineering
2
Doing what we said we would do or Why customers
come to us first...
3
Design Support Buttonclick here
4
Design Support Buttonclick here
5
Stability in High Speed LDO Regulators
  • An overview of the design relating to low drop
    out (LDO) regulators.
  • Design guidelines given for the selection of
    components based on performance and stability
    requirements.
  • Typical questions that generally need or get
    asked
  • What are my input and output requirements?
  • Do I have transient response and magnitude
    requirements?
  • Can I use a regulator or do I need a controller?
  • What do I need for output capacitors?
  • If my regulator is oscillating, what do I change
    to stop it?
  • My regulator response is slow, so how do I speed
    it up without causing it to oscillate?
  • The following slides introduce the different
    components
  • and block diagrams for LDO regulators.

6
Example LDO Controller Block Diagram
  • Block diagram showing dual LDO controller.
  • Startup, Over current, and Shutdown functions.
  • Band Gap reference for setting DC output voltage.
  • Error Amplifier for controlling external
    N-channel FET.
  • Second channel FET turn on for shorting input to
    output.

MC33567 Dual LDO Controller
7
LDO Regulator Block Diagram
8
LDO Regulator Schematic
LDO Controller
Driver
Load
Error Amp
Feedback Divider
Output Capacitor
Reference Input
9
Simplified Block Diagram and Transfer Function
10
Error Amplifier Detail - A(s)
- error amp open loop gain
- dominant error amp pole
- secondary error amp pole
- error amp gain bandwidth
  • Open loop gain greater than 60dB (for less than
    0.1 DC output error).
  • Dominant pole usually set for device, although
    some devices allow adjusting via compensation
    pin.
  • Gain bandwidth usually specified
  • Solve for gain bandwidth pole
  • Error amp designed to have secondary pole greater
    than gain bandwidth and usually NOT specified. If
    not, let
  • For stability analysis, assume frequency range

11
Feedback Divider Detail - C(s)
  • Want to design divider for DC gain of Av and AC
    gain of 1.
  • Want V1 independent on reference input, Vr.
  • Need AC gain of 1 for frequencies greater than
    low frequency pole of error amp.
  • LDO controller with fixed output voltage has
    divider built-in and optimized.
  • If adding to existing internal divider, follow
    same guidelines.
  • Use following design guidelines to obtain these
    result.

12
Feedback Divider Detail - C(s) - Continued
Divider Design Guidelines
- output voltage (known). - reference voltage
(known). - DC gain (solve for). - gain bandwidth
(from error amp analysis). - error amp input
capacitance (use 10pf if not specified). - first
divider resistor (solve for). - second divider
resistor (solve for). - divider compensation
capacitor (solve for).
Final solution for divider transfer function -
C(s)
13
Output Driver and Load Detail - B(s)
Error Amp Output
Driver
  • Transfer function for B(s) shown mainly for
    reference.
  • Too complicated to deal with directly.
  • Will develop design guidelines combining this
    with other functions to develop overall closed
    loop transfer function.

Output Capacitor
Load
14
LDO Closed Loop Transfer Function - H(s)
  • Combining A(s), B(s), and C(s) into the
    expression for H(s) yields the following, which
    is ONLY shown for reference.
  • The expression for H(s) contains 4 poles and one
    zero.
  • It is far too complicated to work from directly.
  • Stable response requires poles to be in left hand
    plane.
  • Analyze pole locations in terms of circuit
    parameters to make poles be critically or
    over-damped (no gain peaking in closed loop
    response).

15
LDO Closed Loop Transfer Function - H(s) -
Continued
LDO Regulator Stability Design Guidelines
- secondary pole for open loop (solve for). -
error amp second pole (known or assumed). -
driver pole frequency (if driver built in, let
). - gain bandwidth (from error amp
analysis). - maximum driver transconductance gain
(if driver built in, then is the
output impedance of the regulator). - ESR
resistance of output capacitor (solve for). -
output capacitor (solve for). - overall loop
response time (solve for).
16
LDO Closed Loop Stability Analysis Conclusion
  • Following design guidelines for voltage divider
    and stability will yield stable LDO regulator.
  • Design can be optimized for speed with stable
    operation.
  • Little or no overshoot ringing for output
    transient currents.
  • Design guidelines can be used in reverse to find
    error amp gain bandwidth if output capacitor and
    ESR given.
  • Guidelines show designer which parameters to
    change to improve stability and/or loop response
    time for design and/or actual circuits.
  • Guidelines help designer to select proper
    controller/driver for application.
  • No need to solve for poles/zeros or graphically
    analyze Bode plots for unity gain phase margins.
  • All conditional guidelines must be met for
    stability.
  • Guidelines do not guarantee perfect operation due
    to unknown parasitics and unknowns.
  • Still need to simulate and prototype final
    design.
  • Following is a design example demonstrating use
    of guidelines.

17
Example Design using Guidelines
  • Example LDO regulator design demonstrating design
    guidelines.
  • Following graphs show closed loop response for
    changes in circuit.
  • Circuit at left shows components used for
    examples.
  • Design guidelines valid for other circuit
    configurations as well.
  • These include PFET controllers and bipolar (NPN
    and PNP).
  • Output stability necessary for steady state and
    transient output currents.

Circuit parameters MC33567 - 5MHz gain
bandwidth 50 ohm output
impedance Optimized internal
divider MTD3055 - 7 mhos transconductance gain
2200 pf input capacitance Load -
0.9A (2 ohms)
18
Frequency Response Analysis
19
Waveform for varying ESR of output capacitor.
Rs 30 milliohms appears optimal. (Co
10,000uF).
  • Changing the ESR (Rs) of the output capacitor
    beyond the recommended upper and lower limits
    tends towards instability (gain peaking).
  • Making the ESR larger speeds up the closed loop
    response but may increase the magnitude of the
    initial transient response due to fast changes in
    output current.

20
Waveform for varying output capacitance.
Co gt 100uF yields same response. (Rs 30
milliohms)
  • Output capacitance less than lower limit tends
    towards instability (gain peaking).
  • Output capacitance greater than lower limit yield
    same result (choose type and value to meet ESR
    requirements).

21
Waveform for changing output driver - gm and Ci.
MTD3055 gm 7, Ci 2200pf MTD3302 gm 28, Ci
6600pf (Co 500uF, Rs 30mohm)
  • System optimized for using MTD3055.
  • Changing output driver FET can impact loop
    stability (as shown for this example).
  • If drivers need to be interchangeable, design for
    higher gain device (gm) and others will be stable
    (although loop will be slower).

22
Waveform for varying gain bandwidth of controller
Designed for (Af)o 5MHz. (MTD3055, Co500uF,
Rs30mohm)
  • System optimized for gain bandwidth of MC33567
    (5MHz).
  • Making gain bandwidth higher tends towards
    instability (gain peaking).
  • If designing with error amp compensation, can
    achieve stability by varying gain bandwidth.

23
Transient Response in Stable LDO regulators
  • Transient response for changes in output currents
    becomes straight forward if LDO regulator closed
    loop response is stable.
  • Magnitude of transient depends on rate/magnitude
    of change and ESR of output capacitor.
  • Worse case is step change in output current (
    ).
  • Time for transient to return to nominal output is
    proportional to closed loop response time.
  • Following is example of previous regulator design
    transient response for stable and less than
    stable conditions.

Typical Transient Response
24
Transient Response Example for Previous Design
(for optimized design)
(from graph)
MTD3055 gm 7, Ci 2200pf (Co 500uF, Rs
30mohm)
(from graph)
  • From graph, optimized design is critically
    damped.
  • Over optimized designs slower but stable.
  • Designs outside of guidelines tend to oscillate.
  • Response time and transient amplitude agree with
    guidelines.

25
Presentation Summary
  • Specify design output voltage and current (steady
    state and transient).
  • Follow design guidelines.
  • Select controller best suited.
  • Simulate and prototype circuit.
  • Adjust components for optimal performance.

26
MicroIntegrationTM
A small-package-scale integration effort that
combines multiple discrete, logic and MOS
devices, which may include passive devices
(resistors, capacitors, inductors).
Reduces the total number of discrete passive
components thereby simplifying and or
reducing - System Cost - Procurement
activity - Design Complexity - Overall size -
Insertion cost - Component count -
Performance inconsistencies - Solder reliability
issues
To Turn This
Into This
27
Customer benefits
Improve marketplace opportunities - Performance
improvement - Size reduction - Reliability
improvements - Component interaction
reduction Reduce overhead costs - Inventory
Purchase Management - Floor and shelf space -
Inspection - Component Obsolescence
  • Lower manufacturing costs
  • - Assembly line setup time
  • - Capital equipment utilization
  • - Equipment costs
  • Assembled wrong part ( yield)
  • Reduced insertion costs
  • Lower materials costs
  • - Component costs
  • - Board/substrate costs
  • - Eliminate parts (eg. shields)

28
Three types of products comprise the portfolio
Transient Protection Arrays
Filter circuits
Vcc
Drive Circuits
29
MicroIntegrationTM Markets
  • Automotive
  • 42/14v systems, in-car entertainment systems
  • Computing
  • Power Supplies, Laptop, PC/ MTB PC, Server/ MTB
    Server, Work Station, Main Frame, Mid-range,
    Storage, Disk Drives, Peripherals, Printers,
    Monitors, Scanners
  • Consumer
  • Power Supplies, Set-Top Boxes, Game Consoles,
    Smartcards, MP3s, DVDs, VCRs, Camcorders, Digital
    Cameras, Appliances, CD/ DVD Players, Handheld
    Game Boys
  • Wireless Portable
  • Power Supplies/chargers, Mobile Phones, Cordless
    Phones, Pagers, HH PC/PDA,Smartcards,.

30
Transient Voltage Suppression (TVS)
31
Transient Protection Applications
IC Protection
32
Filters
33
Low Pass Pi filter with TVS Protection
34
Filter Circuits
R
R
35
Drive Circuits
36
Drive Circuits
37
Charge Controller Solution
Analog Device MC33340, MC33342 Battery Fast
Charge Controllers
MicroIntegrationTM
38
Todays Solution For Lithium-Ion Battery
Management
39
Power Sequencer
Application 3.3V/1.8V Power Sequence
Market Segment Computing
End Products Mother Board
40
Lithium Battery Driver
Battery charge
IC control
Market Segment Wireless,Consumer
Application Lithium Battery Driver
End Products Hand Helds
41
Foldback Current Limiter
Application Over Current Protection
Market Segment Consumer
End Products Set Top Box- 3 per box.
42
uP to FET Driver - Automotive
Application Bias Driver Circuit
Market Segment Automotive
End Products Engine Control Module
43
MicroIntegrationTM Packages
MicroLeadless
44
MicroLeadless Series
45
80 mils
80 mils
46
Flip chip model vs MicroLeadlessTM model
Bump inductance
Need library for parasitics
Flip chip
Bump inductance
Bonding inductance
Need library for parasitics
MicroLeadlessTM
Ground inductance
47
Bumped flip chip S21 vs frequency
48
MicroLeadlessTM S21 vs frequency
49
Alex Lara Applications Engineer
  • BSEE from University of Guadalajara
  • 5 years experience in applications
  • Motorola, ON Semiconductor
  • Engineering Lab Manager
  • Multiple articles and application notes

50
STANDARD DESCRIPTIVE JOB TITLE FOR AN
APPLICATIONS ENGINEER WITHIN THE SEMICONDUCTOR
MARKET Develop new product ideas and
specifications build hardware/software
prototypes to verify new product feasibility
design and build new product evaluation and demo
boards develop SPICE macro models and perform
system simulations of new products and
applications assist in evaluating and debugging
new products evaluate and build comparative
matrices of Competitive products generate
product briefs, data sheets and application
notes conduct on-site design programs of new
products with market leading Alpha site
companies and interface with customers and sales
staff and provide technical training to Sales and
FAE's.
Applications Engineering Key Activities
  • Develop new applications concepts
  • New designs implementation
  • Technical Reports
  • Simulation of applications circuits
  • Design-ins
  • Applications Notes Development
  • Troubleshooting Customer Application needs
  • SPICE simulations Development

51
ON Semiconductor
Universal Serial Bus
ON Semiconductor Applications Engineering
Activities for USB Port Applications
52
  • Background
  • USB, or Universal Serial Bus, is a peripheral bus
    connectivity standard which was conceived,
    developed and is supported by a group of leading
    companies in the computer and telecommunication
    industries Compaq, DEC, IBM, Intel, Microsoft,
    NEC and Northern Telecom. The current standard
    published and implemented on most of the USB
    devices is version 1.1, nevertheless, the good
    news is, USB is getting even faster, USB 2.0
    promises even higher data transfer rates, up to
    480 Mbps. The higher bandwidth of USB 2.0 will
    allow high performance peripherals, such as
    monitors, video conferencing cameras,
    next-generation printers, and faster storage
    devices to be easily connected to the computer
    via USB. The higher data rate of USB 2.0 will
    also open up the possibilities of new and
    exciting peripherals. USB 2.0 will be a
    significant step towards providing additional I/O
    bandwidth and broadening the range of peripherals
    that may be attached to the PC.
  • USB 2.0 is expected to be both forward and
    backward compatible with USB 1.1. Existing USB
    peripherals will operate with no change in a USB
    2.0 system. Devices such as mice, keyboards and
    game pads, will not require the additional
    performance that USB 2.0 offers and will operate
    as USB 1.1 devices. All USB devices are expected
    to co-exist in a USB 2.0 system. The higher speed
    of USB 2.0 will greatly broaden the range of
    peripherals that may be attached to the PC. This
    increased performance will also allow a greater
    number of USB devices to share the available bus
    bandwidth, up to the architectural limits of USB.
  • USB 1.1 devices operate at two different levels
    of speed
  • Low speed, 1.8Mb/s equivalent to 900KHz (ENCODE,
    NRZI Non Return Zero Inverter)
  • Full speed, 12Mb/s equivalent to 6MHz
    (ENCODE, NRZI Non Return Zero Inverter)
  • USB 2.0 devices operate are compatible to operate
    at three different levels of speed
  • Low speed, 1.8Mb/s equivalent to 900KHz
    (ENCODE, NRZI Non Return Zero Inverter)
  • Full speed, 12Mb/s equivalent to 6MHz
    (ENCODE, NRZI Non Return Zero Inverter)
  • High speed, 480Mb/s equivalent to 240MHz
    (ENCODE, NRZI Non Return Zero Inverter)

53
USB Connectivity
USB allows for multiple peripheral connectivity
with one (1) Host 1 PC.
Host PC-USB Hub Connection
PDAs
Cell Phones
D. Cameras
Add other HUBs
Scanners
Printers
54
USB Opportunities Areas
  • 1) ESD Protection and surge protection
  • Devices must comply with the IEC 61000-4-2
  • Comply with Telcordia (formerly Bellcore)
    GR1089
  • on Surge 8x20usec waveform
  • USB 2.0 now requires Transmission Speeds up to
  • 480Mbits/sec (240MHz), that forces to get lower
  • capacitances (lt5pF)

USB Device/Circuit/Component Protection
  • 2) Power Management
  • 5V 3.3V Regulators
  • Features
  • Power switch (pending to research)

USB Power Management for Host and Peripherals
  • 3) EMI Filtering / Termination Detection
  • Pi Filters (RC), T Filters (LC)
  • Pull up Pull down resistors for speed
    detection
  • (Rpu, Rpd)
  • Impedance matching resistors (Zhsdrv)

USB Signal Integrity
55
USB ESD Applications
  • Considerations for the USB ESD and TVS Protection
  • IEC 61000-4-2 Contact and Air Discharge
    compliance for ESD
  • Protection.
  • Obtaining the lowest insertion loss in the
    transmission line over a
  • specific operating bandwidth.
  • Lower capacitances (less than 5pF) to support
    USB 2.0
  • transmission speeds up to 480Mbits/sec (240MHz).

example ESD/TVS from connection your PDA to
your computer
56
USB ESD Applications (contd)
Typical USB Application
HOST PC
D. Cameras PDAs Printers Scanners etc.
Dual USB port protection
Single USB port protection
57
USB ESD Applications (contd)
Compliance with IEC 6100042, ESD International
Standard This International Standard relates to
the immunity requirements and test methods for
electrical and electronic equipment subjected to
static electricity discharges, from operators
directly, and to adjacent objects. It
additionally defines ranges of test levels which
relate to different environmental and
installation conditions and establishes test
procedures. The object of this standard is to
establish a common and reproducible basis for
evaluating the performance of electrical and
electronic equipment when subjected to
electrostatic discharges. In addition, it
includes electrostatic discharges which may occur
from personnel to objects near vital equipment.
IEC 61000-4-2 Test Levels
This figure shows a real 8KV contact waveform
taken from the ESD generator.
This figure shows how the TVS clamps the ESD
condition from 8KV to 8.7V, this is the way in
which protection against ESD conditions is
achieved by using TVS
58
USB ESD Applications (contd)
Low capacitance (less than 5pf) for High speed
I/O Data lines (USB 2.0) Low capacitance (lt
5.0 pf) is one of the most important
characteristics that any device intended to be
used in USB applications must have in order to
minimize the signal attenuation at high speed
data rate (480 Mbs, USB 2.0). This characteristic
is critical, otherwise, the functionality of the
USB system could be affected dramatically during
high speed operation. Actually, the USB2.0 spec
establishes that the capacitance between I/O data
lines lines must no be higher than 5pf.
Theoretical principle used to predict the
capacitance between I/O lines for the NUP4201DR2
device
Simplified Junction capacitance Model
Junction capacitance Model
Real Lab measurements
The total devices characterized showed an average
capacitance value of around 4.45 pf between I/O
lines which complies with the USB 2.0
specification (5.0 pf maximum) and reflects the
results obtained from the pspice model.
C4.52pf
59
USB EMI Filtering/Termination
EMI Filtering for USB 2.0 Applications.
For USB 2.0 applications, the usage of common
mode choke inductors is very common for EMI
filtering purposes since no extra capacitance is
added between the I/O data lines.
60
USB EMI Filtering/Termination
EMI Filtering for USB 2.0 Applications.
The equivalent PSPICE circuit for a TDK Choke
model ACM2012-900-2P is shown below and also, its
configurations for common and differential mode
operation
Common Mode
Differential Mode
61
USB EMI Filtering/Termination
EMI Filtering for USB 2.0 Applications.
Common and Differential mode response of the TDK
Choke model ACM2012-900-2P
Common Mode. In common mode operation, the
Choke will have very high attenuation and
will not allow the noise to go into the system.
As shown in the graph (Common Mode), it starts
having high attenuation (-10dB or higher) when
the frequency is around 50MHz.shows a high loss
characteristics.
Differential Mode. In differential mode
operation, the choke will not have high
attenuation unless the noise signal is very high
frequency (5GHz or higher). As shown in the
graph, it starts having high attenuation (-10dB
or higher) when the frequency is around 5GHz.
62
USB EMI Filtering/Termination
EMI Filtering for USB 2.0 Applications.
V1 USB 2.0 signal applied (240MHz) V2
Noise signal (5GHz)
TDK Choke Filtering response (Differential mode)
63
USB EMI Filtering/Termination
EMI Filtering for USB 2.0 Applications.
V1 USB 2.0 signal applied (240MHz) V2
Noise signal (5GHz)
LC Filter, Filtering response (Differential mode)
64
  • CONCLUSION
  • Applications Engineers are key in the definition
    and understanding of the guide lines for New
    Products Development.
  • Applications Engineers are key to increase the
    business of the companies because most of the
    time they represent an added value for the
    customers which allows to create a relation-ship
    between the company and the designers, thereby,
    creation of new business opportunities.
  • Applications Engineers are key to promote the
    companies products by educating the sales
    department, supporting trade-shows and developing
    demo-kits.
  • Applications Engineers are key to win design-ins
    because they can help in suggesting the most
    proper device for any particular application and
    also they can show and explain the capability of
    the companies products.

65
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