ECE U322 Digital Logic Design

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ECE U322Digital Logic Design
Oct. 27, 2005

• Lectures 21
• Latches
• Flipflops
• Reading Marcovitz 6.2
• Homework 5 due Today

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Characteristic Equation

• Like Boolean logic equation SR Latch
• output is function of inputs
• now inputs are S, R and Q, output is Q
• Captures behavior of SR latch

3
State Diagram

• Bubble represents a state
• Arc between bubbles represents a state transition
• Arc is labeled with inputs that cause state
  transition

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D Latch
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Latches Summary

• SR latch Q S RQ
• SR latch with control input
• Q SC R Q CQ
• D latch Q DC CQ

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D Flip-Flop
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J-K Flip-Flop
State Diagram
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Negative Edge Triggered
clock J K Q
toggle JK1
hold JK0
reset J 0 K1
set J 1 K0
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T Flip-Flop
State Diagram
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Summary
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Flip-Flop Excitation Tables
Recall
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Flip-Flop Excitation Tables
Recall
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Flip-Flop Excitation Tables
Recall
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Flip-Flop Excitation Tables
Recall
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We can build one flip-flop from another.

• J-K flip-flop from D flip-flop

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We can build one flip-flop from another.

• T flip-flop from J-K flip-flop

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Datapath for Lab 4 Calculator
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Calculator Components

• ALU (Lab 3)
• 2-to-1 Mux
• Temp register
• Stack
• Which are combinational?
• Which are sequential?
• Which have a reset?
• Synchronous or Asynchronous ?

19
Implement the Stack

• In lab, used shift registers to implement the
  stack
• Translate hold, push, and pop to
• control inputs for shift register
• shift left, shift right ...

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To push new data on the stack

• To push data from the input switches on the
  stack
• need ______ clock cycles
• Mux inputs are set to ____
• ALU inputs are set to ____
• stack inputs are set to ____

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To pop data from the stack

• need ______ clock cycles
• Mux inputs are set to ____
• ALU inputs are set to ____
• stack inputs are set to ____

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To add tos with new data

• To add tos with new data from the input
  switches
• need ______ clock cycles
• Mux inputs are set to ____
• ALU inputs are set to ____
• stack inputs are set to ____

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