ECE U322 Digital Logic Design

1
ECE U322Digital Logic Design
Oct. 17 2005

• Lectures 16
• Binary Decoder
• Encoder
• Reading Marcovitz 5.3, 5.4
• HW 4 due this Thursday

2

• Half Adder
• Combinational circuit the performs the addition
  of two bits.
• Full Adder
• Combination circuit that performs the addition of
  three bits (two bits and a carry in).

3
Binary Ripple Carry Adder

• The full adders are connected in cascade, with
  the carry output from one full adder connected to
  the carry input of the next-higher-order full
  adder.

4
Carry out and Overflow

• 5, 7, -5, -7 represented as 4 bit, signed
  values
• 0101 0111, 1011, 1001
• 5 7
• 0101
• 0111
• __overflow, __ carry out

5
How to build a binary subtractor

• (A - B) A (2s complement of B)
• Invert B inputs
• Add 1 to A - B
• Can set carry in to 1 to accomplish this

6
Binary subtractor

• Binary subtractor using full adders
• S A B A (2complement of B)

7
A 4-Bit Adder-Subtractor
8
An n-bit adder
Generalize the four bit adder to n bits
9
Carry-lookahead adder

• First compute carry propagate, generate
• Pi ai xor bi
• Gi ai bi
• Compute sum and carry from P and G
• si ai xor bi xor ci Pi xor ci
• ci1 Gi Pici

10
Depth-4 carry-lookahead
11
Decoders

• n-bits represent 2n different combinations

12
Binary Decoder

• Logic with n input lines and 2n output lines.
• Only one output is a 1 for any given input.

13

• truth table for 2 to 4 decoder
• Note Each output is a 2-variable minterm (X'Y',
  X'Y, XY' or XY)

14
3-to-8-Line Decoder
15
(No Transcript)
16
(No Transcript)
17
Decoders

• In general, for an n-bit code, a decoder could
  select up to 2n lines

18
Decoder Expansion

• When a certain size of decoder is needed, but
  only smaller sizes are available.
• It is possible to combine two or more decoders in
  a hierarchy.

19
Combinational Circuit Implementation

• Decoders can implement any combinational circuit
  with n inputs and m outputs using a _____________
  decoder and ________ gates.

20

• Example Implement a Binary Adder using a
  decoder.
• Express as sum of minterms.

S(X,Y,Z) S m( ) C(X,Y,Z) S m(
)
21

• Choose a decoder that implements all the minterms
  of the input variables.
• Select inputs to each OR gate based on the list
  of minterms of each function.

22
Example
23
Encoder

• 2n (or fewer) input lines and n output lines.
• The output lines generate the binary code
  corresponding to the input value, assuming only
  one input is high.
• An encoder is the reverse function of a decoder

24
8-to-3-line Encoder
8-to-3 Encoder
25
Example Octal-to-Binary Encoder
A0 A1 A2
26
Ambiguity

• If two inputs are active simultaneously, the
  output produces an incorrect combination.
• To resolve, some encoders use an input priority
  to ensure that only one input is encoded.
• An output of all 0s is generated when all the
  inputs are 0. This is the same as when D0 is
  equal to 1.
• This discrepancy can be resolved by providing one
  more output to indicate that at least one input
  is equal to 1. This is called the VALID output.

27
Priority Encoder

• If two or more inputs are equal to 1 at the same
  time, the input with highest priority takes
  precedence.

28
Example
Truth Table of 4-Input Priority Encoder
29
Maps for Priority Encoder
30
(No Transcript)
31
Multiplexers
32
Multiplexers (MUX)

• Data selector.
• Selects binary information from one of many input
  lines to a single output line.
• Selection inputs control which particular input
  line to select.
• Normally, there are 2n input lines, n selection
  inputs, and one output.

33
(No Transcript)
34
Multiplexer

• Four-to-one multiplexer contains a decoder.

35
Multiplexer

• An application

Helps share a single communication line among a
number of devices. At any time, only one source
and one destination can use the communication
line.
36
Demultiplexer

• Given an input line a set of selection lines,
  the demultiplexer will direct data from input to
  a selected output line.
• An example of a 1-to-4 demultiplexer

37
Demultiplexer

• The demultiplexer is actually identical to a
  decoder with enable, as illustrated below