THE INVERTERS

1
THE INVERTERS
2
DIGITAL GATES Fundamental Parameters

• Functionality
• Reliability, Robustness
• Area
• Performance
• Speed (delay)
• Power Consumption
• Energy

3
Noise in Digital Integrated Circuits
4
DC Operation Voltage Transfer Characteristic
5
Mapping between analog and digital signals
6
Definition of Noise Margins
7
The Regenerative Property
8
Fan-in and Fan-out
9
The Ideal Gate
10
VTC of Real Inverter
11
Delay Definitions
12
Ring Oscillator
13
Power Dissipation
14
CMOS INVERTER
15
The CMOS Inverter A First Glance
16
CMOS Inverters
1.2
m
m
2l
Out
In
GND
17
Switch Model of CMOS Transistor
18
CMOS Inverter Steady State Response
19
CMOS Inverter Transient Response
20
CMOS Properties

• Full rail-to-rail swing
• Symmetrical VTC
• Propagation delay function of load capacitance
  and resistance of transistors
• No static power dissipation
• Direct path current during switching

21
Voltage TransferCharacteristic
22
PMOS Load Lines
23
CMOS Inverter Load Characteristics
24
CMOS Inverter VTC
25
Simulated VTC
26
Gate Switching Threshold
27
MOS Transistor Small Signal Model
28
Determining VIH and VIL
29
Propagation Delay
30
CMOS Inverter Transient Response
31
CMOS Inverter Propagation Delay
32
Computing the Capacitances
33
CMOS Inverters
1.2
m
m
2l
Out
In
GND
34
The Miller Effect
35
Computing the Capacitances
36
Impact of Rise Time on Delay
37
Delay as a function of VDD
38
Where Does Power Go in CMOS?
39
Dynamic Power Dissipation
2
Energy/transition C
V
L
dd
2
Power Energy/transition
f
C
V

f
L
dd
Not a function of transistor sizes!
Need to reduce C
, V
, and
f
to reduce power.
L
dd
40
Impact ofTechnology Scaling
41
Technology Evolution
42
Technology Scaling (1)
Minimum Feature Size
43
Technology Scaling (2)
Number of components per chip
44
Propagation Delay Scaling
45
Technology Scaling Models
46

Scaling Relationships for Long Channel Devices
47

Scaling of Short Channel Devices
48
BIPOLAR INVERTERS
49
Resistor-Transistor Logic
50

VTC of RTL Inverter
VOH is function of fan-out
51

Transient Response of RTL Inverter
52
The ECL Gate at a Glance
Core of gate The differential pair or current
switch
53
Single-ended versus Differential Logic
Differential
Single-ended
54
Complete ECL Gate
Emitter-follower output driver
55
The Bias Network

• Issues
• Temperature variations
• Device variations

56
Photomicrograph of early ECL Gate (1967)
57
ECL VTC
58
ECL VTC
Vswing IEE RC
59
Simulated VTC of ECL Gate
60
ECL Gate with Single Fan-out
61
Simulated Collector Currents of Differential Pair
62
Propagation Delay of ECL Gate
63
Simulated Transient Response of ECL Inverter
64
Propagation Delay as a Function of Bias Current
65
ECL Power Dissipation
66
Scaling Model for Bipolar Inverter
67
Bipolar Scaling