ELEN468 Advanced Logic Design

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ELEN468 Advanced Logic Design

• Lecture 1 Introduction

2
Chips Everywhere!
3
Market Size

• By 8/12/06, 25th anniversary of IBM PC
• 1.5 billion PCs sold world wide
• 3,100 billions worth
• Information technology accounts for
• 3 of US GDP
• 25 of GDP growth
• are information technology
• companies are Electronics industry 1T
• Semiconductor industry 200B

4
Who is this Guy?

• Moores Law Number of transistors doubles every
  18 months

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Analogue

• In 1978, a commercial flight between New York and
  Paris cost 900 and took 7 hours.
• If Moores Law were applied to the airline
  industry, today that flight could cost
• Less than 1 penny
• Less than 1 second

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What are inside a chip?

• A chip may include
• Hundreds of millions of transistors
• Mb embedded SRAM
• DSP, IP cores
• PLL, ADC, DAC
• 100 internal clocks
• Design issues
• Speed
• Power
• Area
• Signal integrity
• Process variation
• Manufacturing yield

Source Byran Preas
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Technology Roadmap for Semiconductors
Technology ? minimal transistor feature size
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Chip Design Productivity Crisis
10,000,000
100,000,000
1,000,000
10,000,000
58/Yr. Complexity growth rate
100,000
1,000,000
10,000
100,000
Transistor/Staff-Month
Transistors/Chip (K)
1,000
10,000
x
x
100
1,000
x
x
x
x
x
21/Yr. Productivity growth rate
x
10
100
1
10
1998
2003
Source NTRS97
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Solutions

• Apply CAD tools
• High level abstraction
• Learn Verilog !

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Basic Design Flow

• System design
• Instruction set for processor
• Hardware/software partition
• Memory, cache
• Logic design
• Logic synthesis
• Logic optimization
• Technology mapping
• Physical design
• Floorplanning
• Placement
• Routing

System/Architectural Design
Logic Design
Physical Design/Layout
Fabrication
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Design Cycles
System/Architectural Design
HDL
Logic Design
Verification/Simulation
Physical Design/Layout
Parasitic Extraction
Fabrication
Testing
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Design and Technology Styles

• Custom design
• Mostly manual design, long design cycle
• High performance, high volume
• Microprocessors, analog, leaf cells, IP
• Standard cell
• Pre-designed cells, CAD, short design cycle
• Medium performance, ASIC
• FPGA/PLD
• Pre-fabricated, fast automated design, low cost
• Prototyping, reconfigurable computing

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Why do we need HDLs ?

• HDL can describe both circuit structure and
  behavior
• Schematics describe only circuit structure
• C language describes only behaviors
• Provide high level abstraction to speed up
  design
• High portability and readability
• Enable rapid prototyping
• Support different hardware styles

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What do we need from HDLs ?

• Describe
• Combinational logic
• Level sensitive storage devices
• Edge-triggered storage devices
• Provide different levels of abstraction and
  support hierarchical design
• System level
• RTL level
• Gate level
• Transistor level
• Physical level
• Support for hardware concurrency

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Two major HDLs

• Verilog
• Slightly better at gate/transistor level
• Language style close to C/C
• Pre-defined data type, easy to use
• VHDL
• Slightly better at system level
• Language style close to Pascal
• User-defined data type, more flexible
• Equally effective, personal preference

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Schematic Design
a
sum
b
c_out_bar
c_out
sum a ? b c_out a b
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Taste of Verilog

• module Add_half ( sum, c_out, a, b )
• input a, b
• output sum, c_out
• wire c_out_bar
• xor (sum, a, b)
• nand (c_out_bar, a, b)
• not (c_out, c_out_bar)
• endmodule

a
sum
b
c_out_bar
c_out
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Behavioral Description

• module Add_half ( sum, c_out, a, b )
• input a, b
• output sum, c_out
• reg sum, c_out
• always _at_ ( a or b )
• begin
• sum a b // Exclusive or
• c_out a b // And
• end
• endmodule

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Example of Flip-flop

• module Flip_flop ( q, data_in, clk, rst )
• input data_in, clk, rst
• output q
• reg q
• always _at_ ( posedge clk )
• begin
• if ( rst 1) q 0
• else q data_in
• end
• endmodule

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Conclusion

• VLSI Chips
• Chip design flow
• Chip design styles
• Why do we need HDLs ?
• What do we need from HDLs ?
• Examples of Verilog HDL