Sensor Development Program

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Sensor Development Program

• LSST Directors Review
• SLAC
• March 8-9, 2006
• Veljko Radeka (BNL)
• for the Sensor Working Group
• Don Figer (STScI), John Geary (CfA), Kirk Gilmore
  (SLAC), Paul OConnor (BNL), John Oliver (HEPL
  Harvard), Christopher Stubbs (Harvard), Peter
  Takacs (BNL), Tony Tyson (UC Davis)

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Outline

• Science requirements ? sensor requirements
• Technology developments required
• QE and PSF considerations
• Window technology
• CCD strawman design
• PIN Detector Array CMOS Readout
• The Study projects
• Production prototype Development
• Time Table
• The technology choice When?
• Development followup and testing program

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From LSST Science Reqts to Sensor Reqts

• High QE to 1000nm ? thick silicon (gt
  75 µm)
• PSF ltlt 0.7 (0.2) ? high internal
  field in the sensor
• ? high resistivity substrate (gt 5
  kohmcm)
• ? high applied voltages (30 - 50
  V)
• ?
  small pixel size (0.2 10 µm)
• Fast f/1.2 focal ratio ? sensor flatness lt 5µm
• ? package with piston, tip, tilt adj. to
  1µm
• Wide FOV ? 3200 cm2 focal plane
• ? gt 200-CCD mosaic (16 cm2 each)
• ? industrialized production process required
• High throughput ? gt 90 fill
  factor
• ? 4-side buttable package, sub-mm gaps
• Fast readout (1 - 2 s) ? segmented sensors (6400
  TOTAL output ports)
• ?
  150 I/O connections per sensor

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Advances in State-of-the-Art needed for LSST
Detector

• The effective pixel readout speed will have to
  be about two orders of magnitude higher than in
  previous telescopes in order to achieve a readout
  time for the telescope of 1 - 2 seconds .
• The sensors will have to have an active region
  100 µm thick to provide sufficiently high
  quantum efficiency (QE) at 1000 nm, and they
  will have to be (over)depleted so that the signal
  charge is collected with minimum diffusion to
  achieve a narrow point spread function (PSF).
  Window biasing independent of the readout is
  essential.
• Packaging ensuring sensor flatness and alignment
  in focal plane to lt5µm (not routinely achieved
  with presently delivered devices by industry).
• Extensive use of ASICs to make the readout of a
  large number of output ports practical, and to
  reduce the number of output links and
  penetrations of the dewar.

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QE at 1000nm vs. thickness, temperature
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Point Spread Function (PSF) in Si
LSST (f1.2!)
Simulation by P. Takacs, BNL
Light spot, cone, absorption?ionization, charge
diffusion ? PSF
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Partial vs Full Depletion

• Conventional CCDs 15-20 µm thick on 20-100 ohmcm
  silicon cannot be fully depleted with 15-20
  volts.
• PSF (rms) thickness of undepleted region.
• Full depletion essential for minimal charge
  spreading,
• PSF (rms) lt 4 µm
• Methods to ensure full depletion
• High-resistivity substrate gt5 kohm cm
• Bias on p (n) back-surface (30-50 volts on 100
  µm)

Illustration from Barry Burke
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Monochromatic PSF vs. thickness
(Velocity saturation included)
Contours of constant PSF
PSF temperature dependence
resistivity 10 kW-cm, p-type
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Optimal focal plane position varies with
wavelength due to divergence of f/1.25 beam
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Window Technology

• A highly doped layer at the window required to
  terminate the field and leave a thin conductive
  layer at the surface.
• Highly doped layer thickness lt10 nm to allow uv
  light into the sensitive (depleted) region.
• Technologies under exploration (must be
  compatible with antireflective coating)
• Ion implantation followed by laser annealing
• Ion implantation followed by furnace annealing
• Chemisorption charging
• Molecular beam epitaxy (MBE)/delta doping
• ITO coating

Ohmic contact
Window
Depleted Undepl.
p N1019/cm3
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The CCD Strawman Design

• Desired features
• 2 sec readout _at_ 250 kHz implies no more than ca.
  500K pixels per output.
• A fairly large area footprint 16 cm2
  
  - to maximize
  the fill factor.
• Flatness requirements argue for bond pads only on
  periphery.
• Segmentation for blooming control of very bright
  stars no more than ca. 500 pixels in the
  parallel direction per segment.
• Contiguous imaging area should be at least 500
  pixels in the parallel direction.

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Outline of the 16 megapixel 32 port strawman
CCD, showing the partitioning and charge
movement for the hardwired split parallel and
serial registers. The pinout is along the left
and right edges. The fill factor is 96.5. (J.
Geary)
Segmented readout to achieve the required readout
time (2 seconds required) with moderate clock
frequency (to minimize read noise and crosstalk),
(e.g., 0.5 Mpixels/output read out at 250 kHz).
10 µm pixels
Full well gt
90,000 e Sensor thickness
100 µm
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Multi-port 4K x 4K 16M CCD strawman
32 segments/ports
Detailed design under Study Program with two CCD
vendors
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PIN-CMOS Hybrid Detector and Readout
independently optimized
3-transistor cell
Bump bond PIN det.

• Charge-to-voltage conversion on source follower
  (SF) in every pixel lower power dissipation than
  CCDs
• Electronic shutter and blooming control
  
  ()
• Large dynamic range by readout up the ramp
  addressable guider readout ()
• Fixed pattern noise and pixel-to-pixel (stable)
  gain differences due to amplifier per pixel
  capacitive (deterministic) crosstalk to adjacent
  pixels (-)
  

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Hybrid Structure (not a monolithic CMOS imager!)

PIN Detector Array CMOS Readout
Integrated Circuit (ROIC) Connected by Indium
Bumps
Silicon Readout Integrated Circuit (ROIC)

• Interconnect technique apparently mature
• Over 16,000,000 indium bumps per array
  demonstrated
• gt99.9 interconnect yield reported by two vendors

Illustration from A. Hoffman
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High resistivity (5 k?cm) PIN detector array,
fully depleted (Vdepl7 V, biased at 40-50
volts), to be bonded to CMOS readout
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RSC - H2RG (2Kx2K, 18 µm pixel) HyViSI Measured
quantum efficiency (courtesy Reinhold Dorn, ESO).
This HyViSI array has a detector layer that is 75
microns thick and a single layer anti-reflection
coating of SiO2 that is 1200Å thick.
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PIN-CMOS 4k x 4k, under development at RSC,
supported in part by an LSST study contract
CMOS ROIC stitched from 8 reticles (outline not
to scale)
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LSST Sensor Development Program

• The principal goal of the LSST Sensor
  Development Program is to arrive at a viable
  production-ready sensor prototype, in one or both
  device technologies, before the start of the LSST
  construction, presently set for Jan 2009.The
  plan to achieve this goal is described concisely
  in the following
• The device technologies being developed are the
  next generation of CCDs with deep overdepleted
  substrate and segmented readout, and the hybrid
  PIN-CMOS. The program has two phases
• Sensor Technology Study Program (1 year
  contracts), and,
• Production-Ready Prototype Development
  Program (2 year contracts).
• The Study Program shall produce test devices with
  all essential characteristics for LSST (QE, PSF,
  read noise, readout time), but may be in a
  smaller format than the required 4kx4k.
• The Prototype Development Program shall result in
  production-ready prototypes

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Milestones
Critically dependent on DOE response
High Risk!
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Technology Selection When ?Some key issues

• CCDs
• Deep depletion CCD design more complex than
  the PIN
• Will the processing of 100 µm sensor chip with
  ohmic contact at the window be successful
  (performance under the required bias, yield,
  cost)?
• (We assume that the segmented readout will work,
  and that the flatness will be achieved.)

• PIN CMOS Hybrid
• The nature of the readout different from the CCD
  
• Will the test devices prove acceptable by the
  astronomer community in evaluation on telescopes,
  in terms of image quality and operation of the
  readout - on a time scale consistent with the
  LSST schedule?

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Development Followup, Device Modelling, Sensor
Evaluation and Testing

• Design and progress reviews under Study
  Contracts
• Modelling of special semiconductor device design
  issues (guard rings, edge areas, independent
  biasing, crosstalk, diffusion, etc.)
• Electrical testing
• PSF measurements
• Optical metrology for sensors and 3x3 rafts
• Clean lab with interferometers,

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Acknowledgements

• Grant from the NSF to T. Tyson, UC Davis, made
  possible the start of the study program with
  vendors
• Support by a private donor (Las Cumbres
  Observatory) made possible exploration of both
  CCD and PIN-CMOS technologies within the study
  program.