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Digitale basistechniek lesplan

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Title: Kuliah 3(a) Author: Default Last modified by: stokkink Created Date: 11/14/2000 5:11:51 AM Document presentation format: Diavoorstelling Other titles – PowerPoint PPT presentation

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Title: Digitale basistechniek lesplan


1
Digitale basistechnieklesplan
Datum Theorie Prakticum Thuis
7 januari Combinational Logic Tutorial Quartus II Herhaling Tutorial
12 Januari Combinational Logic Halfadder Fulladder
14 Januari Functions of Combinational Logic 2 bit decoder BCDto7seg
19 Januari Functions of Combinational Logic 2-1 mux 1-2 demux
21 Januari Flip-Flops and related devices Gated d-latch(8.3) Example 8.12
26 Januari Counters en Statemachines Frequency divider8.11)
28 Januari Counters en Statemachines 4 bit synch counter, verkeerslicht
2 februari Herhaling Verkeerslicht 2
4 februari Oefententamen
9 februari Tentamen

2
Bepaling van het eindcijfer
  • Het eindcijfer wordt bepaald door
  • 1 Voldoende Praktikum. (O/V)
  • Tentamencijfer.

3
Introduction to Logic Gates
  • Logical gates
  • Inverter
  • AND
  • OR
  • NAND
  • NOR
  • Exclusive OR (XOR)
  • Exclusive NOR (XNOR)
  • Draw Logic Circuit
  • Analysis of Logic Circuit

4
Introduction to Logic Gates
  • Universal gates NAND and NOR
  • NAND gate
  • NOR gate
  • Execution using NAND gate
  • Execution using NOR gate
  • Positive Negative Logic
  • SOP Expression Execution
  • POS Expression Execution
  • Integrated Logic Circuit Family

5
Logic Gates
6
Logic Gates
  • Inverter gate
  • The use of inverter complement

7
Logic Gates
  • AND gate

8
Logic Gates
  • OR gate

9
Logic Gates
  • NAND gate

10
Logic Gates
  • NOR gate

11
Logic Gates
  • Exclusive OR (XOR) gate

12
Logic Gates
  • Exclusive NOR (XNOR) gate

13
Draw Logic Gates
  • When Boolean expression is obtained, we can draw
    logic gates
  • Example
  • F1 xyz (use three input AND gate)

14
Draw Logic Gates
15
Logic Circuit Analysis
  • When logic circuit is given, we can analyze the
    circuit to obtain logical expression
  • Example
  • What is the Boolean expression for F4

16
Logic Circuit Analysis
  • What is the Boolean expression for F5

17
Universal Gates NAND NOR
  • Gate AND/OR/NOT is enough to build any Boolean
    function
  • Even though, other gates is also used because
  • Very useful (no choice)
  • Save transistors number
  • Self sufficient (can build any gate from it)
  • NAND/NOR save, self sufficient
  • XOR useful (e.g. execute parity bit)

18
NAND Gate
  • NAND gate is self sufficient (i.e.can build any
    gate from it)
  • Can be used for building AND/OR/NOT gate
  • Build NOT gate using NAND gate

19
NAND Gate
  • Build AND gate using NAND gates
  • Build OR gate using NAND gates

20
NOR Gate
  • NOR gate is also self sufficient
  • Can be used for building AND/OR/NOT gate
  • Build NOT gate using NOR gate

21
NOR Gate
  • Build AND gate using NOR gates
  • Build OR gate using NOR gates

22
Build using NAND gate
  • It is not impossible to build Boolean expression
    using NAND gates
  • Steps
  • Obtain sum-of-product Boolean expression
  • E.g F3 xy xz
  • Use DeMorgan theorem to get expression using two
    level NAND gate
  • E.g F3 xy xz
  • (xyxz)
  • ((xy).(xz))

23
Build using NAND gate
24
Build using NOR gate
  • It is not impossible to build Boolean expression
    using NOR gates
  • Steps
  • Obtain product-of-sum Boolean expression
  • E.g F6 (xy).(xz)
  • Use DeMorgan theorem to get expression using two
    level NAND gate
  • E.g F3 (xy).(xz)
  • ((xy).(xz))
  • ((xy)(xz))

25
Build using NOR gate
26
Positive Negative Logic
  • In logic gate, most of the time
  • H (High Voltage, 5V) logic 1
  • L (Low Voltage, 0V) logic 0
  • This is called positive logic
  • However, if it is inverted, it is negative logic
  • H (High Voltage, 5V) logic 0
  • L (Low Voltage, 0V) logic 1
  • Depends, some similar gate need different Boolean
    function

27
Positive Negative Logic
  • Signal which is set to logic 1 is said to be
    active and true
  • Signal which is set to logic 0 is said to be not
    active and false
  • The name of active high signal is always written
    in non-compliment form
  • The name of active low signal is always written
    in non-compliment form

28
Positive Negative Logic
29
Construction of SOP Expression
  • Sum-of-product expression can be built using
  • Two level logic gate AND-OR
  • Two level logic gate AND-NOT
  • Logic AND-OR gate

30
Construction of SOP Expression
  • NAND-NAND circuit (with transformation circuit)
  • Add two balls
  • Change OR with NAND
  • with inverted input and ball
  • on its compliment input

31
Construction of POS Expression
  • Product-of-sum expression can be built using
  • Two level logic gate AND-OR
  • Two level logic gate AND-NOT
  • Logic AND-OR gate

32
Construction of POS Expression
  • NOR-NOR circuit (with transformation circuit)
  • Add two balls
  • Change AND with NOR
  • with inverted input and ball
  • on its compliment input

     
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