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System Synthesis for Networks of Programmable Blocks

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Title: eBlocks: Embedded Systems Building Blocks Author: susanc Last modified by: UCR student Created Date: 3/29/2004 11:56:13 PM Document presentation format – PowerPoint PPT presentation

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Title: System Synthesis for Networks of Programmable Blocks


1
System Synthesis for Networks of Programmable
Blocks
Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank
Vahid Department of Computer Science and
Engineering University of California,
Riverside rmannion, harry, susanc,
vahid_at_cs.ucr.edu http//www.cs.ucr.edu/eblocks
Also with the Center for Embedded Computer
Systems at UC Irvine This work is being
supported by the National Science Foundation and
a Department of Education GAANN Fellowship
2
Introduction
  • Sensor networks are emerging as an important
    general computing domain
  • Small inexpensive battery-powered sense and
    compute nodes
  • Tens to thousands of nodes
  • Wired or wireless communication
  • Stringent requirements (power, cost, size)

Environmental Monitoring http//www.greatduckislan
d.net/ http//today.cs.berkeley.edu/retreat-6-03/
Military Applications http//robotics.eecs.berkele
y.edu/pister/29Palms0103/
Home Automation http//www.smarthome.com
Structure/Building Monitoring http//www.mrr.dot.s
tate.mn.us/research/MnROAD_Project/MnROADProject.a
sp
Medical Monitoring http//www.eecs.harvard.edu/md
w/proj/codeblue/
3
Introduction
  • Potential sensor network application developers
    may not be computer programmers
  • Instead, engineers, scientists, office workers,
    homeowners, etc.
  • Existing programmable nodes
  • Flexible, but require programming
  • Existing off-the-shelf end applications
  • Specialized, so hard to customize
  • Expensive due to small volumes
  • Our solution eBlocks
  • Enables non-programming users to create simple
    but useful customized sensor network applications

http//www.xbow.com/
Flexible, hard to program
Photo Jason Hill http//www.dustnetworks.com/
Easy to use, inflexible
http//www.smarthome.com
4
Talk Outline
  • Brief introduction to eBlocks
  • Synthesis
  • Motivation
  • Methodology
  • Experiments

eBlock capture tool
Synthesis
Network nodes and programs
5
eBlocks Overview
  • eBlocks (UC Riverside)
  • Began as low-cost reusable basic building blocks
  • Enables non-programmers to create basic but
    useful sensor-based applications
  • Function of each block is pre-defined
  • Block types
  • Sensors motion, light, contact, etc.
  • Output led, electric relay, beeper, etc.
  • Compute logic, prolong, toggle, etc.
  • Basic configuration required (dials, switches)
  • Communicate wireless point-to-point link
  • Users merely connect blocks to create working
    customized application
  • Evolving into a spatial programming methodology
    for sensor networks with programmable nodes
  • CODES/ISSS03, SECON04, CHI05, SPOTS05

6
Creating an application with eBlocks
  • Create an application to detect if the garage
    door is left open at night

7
Building eBlocks Systems
  • The same basic blocks can be used in a variety of
    applications

8
Motivation - Programmable Blocks
  • Programmable blocks are desirable
  • Allows for smaller designs
  • Results in reduced cost and power consumption
  • Limitation - Programmable blocks hard to use by
    non-programmers (requires 2.5 Ph.D.s SECON04
    keynote)
  • Solution eBlocks capture tool, automated
    synthesis generates equivalent programs
  • eBlocks limit potential functionality
  • But range is still useful, and accessible to
    non-programmers

9
Synthesis
  • Synthesis tool
  • Must map network of pre-defined blocks to
    programmable blocks
  • Three stages
  • Design entry/simulation
  • Synthesis -- Partitioning
  • Synthesis -- Code generation

10
Design Entry/Simulation
  • User specifies and tests block design
  • Java-based simulator
  • Blocks added to workspace by dragging blocks from
    Available eBlocks tray
  • Connections created by drawing lines between
    blocks
  • User can create, experiment, test and configure
    design

11
Synthesis -- Partitioning
  • Mapping of pre-defined blocks to programmable
    blocks
  • Problem map pre-defined blocks to minimum
    number of programmable blocks
  • Intermediate blocks (non-sensor, non-output)
  • We assume 2-input/2-output programmable block
    available
  • Partitioning problem differs from existing
    problems
  • Classic bin-packing or knapsack algorithms
  • But we need to be conscious of two constraints
    number of inputs and number of outputs
  • Two-dimensional bin-packing problem (cutting
    stock problem)
  • But number of inputs and outputs of programmable
    block are mutually independent
  • FPGA synthesis, namely DAG covering
  • But we do not require all nodes to be covered
  • Our goal is to minimize block count, many focus
    on minimum-delay solutions or approximations
  • Many solutions permit replications contrary to
    our goal of minimizing block count

12
Synthesis -- Partitioning Strategies
  • Exhaustive
  • Search every combination of n blocks into n
    programmable blocks
  • Extremely long run times (hours)
  • Aggregation
  • Clusters nodes into subgraphs, continue adding
    blocks until unable to fit into programmable
    block
  • Unable to take advantage of convergence thus
    yields non-optimal results
  • Developed a new heuristic PareDown
  • Based on a decomposition method
  • Takes advantage of convergence
  • Unconstrained by depth at which heuristic looks
    ahead
  • Runtime complexity O(n2)

13
Synthesis -- Code Generation
  • For each partition a syntax tree is generated to
    represent equivalent functionality of the
    partition
  • Able to generate C code for each partition to
    download unto a programmable block
  • Simulators interpreter able to evaluate syntax
    tree and simulate corresponding behavior

14
Experiments - Real Designs
  • Executed decomposition and exhaustive search
    algorithms
  • 2 GHz AMD Athlon XP PC
  • Partitioned 15 real designs, developed
    independently from our purposes of synthesis

Averages for Exhaustive Search Averages for Exhaustive Search Averages for Exhaustive Search Averages for PareDown Decomposition Averages for PareDown Decomposition Averages for PareDown Decomposition Averages for PareDown Decomposition Averages for PareDown Decomposition
Inner Blocks (Original) Design Name Inner Blocks (Total) Inner Blocks (Prog.) Time Inner Blocks (Total) Inner Blocks (Prog.) Time Block Overhead Overhead
2 Ignition Illuminator 1 1 lt 1 ms 1 1 lt 1 ms 0 0
2 Night Lamp Controller 1 1 lt 1 ms 1 1 lt 1 ms 0 0
2 Entry Gate Detector 1 1 lt 1 ms 1 1 lt 1 ms 0 0
2 Carpool Alert 1 1 lt 1 ms 1 1 lt 1 ms 0 0
3 Cafeteria Food Alert 1 1 lt 1 ms 1 1 lt 1 ms 0 0
3 Podium Timer 2 1 1 lt 1 ms 1 1 lt 1 ms 0 0
3 Any Window Open Alarm 3 0 lt 1 ms 3 0 lt 1 ms 0 0
3 Two Button Light 3 1 lt 1 ms 3 1 lt 1 ms 0 0
5 Doorbell Extender 1 5 0 lt 1 ms 5 0 lt 1 ms 0 0
6 Doorbell Extender 2 6 0 9 ms 6 0 lt 1 ms 0 0
8 Podium Timer 3 3 3 125 ms 3 2 lt 1 ms 0 0
10 Noise At Night Detector 6 4 4.79 s 6 4 lt 1 ms 0 0
19 Two-Zone Security System -- -- -- 10 3 lt 1 ms -- --
19 Motion on Property Alert -- -- -- 19 0 lt 1 ms -- --
23 Timed Passage -- -- -- 14 5 lt 1 ms -- --
15
Results - Random Designs
  • Nearly 10,000 randomly-generated designs were
    also tested

Averages for Exhaustive Search Averages for Exhaustive Search Averages for Exhaustive Search Averages for PareDown Decomposition Averages for PareDown Decomposition Averages for PareDown Decomposition Averages for PareDown Decomposition Averages for PareDown Decomposition
Inner Blocks (Original) Number of Designs Inner Blocks (Total) Inner Blocks (Prog.) Time Inner Blocks (Total) Inner Blocks (Prog.) Time Block Overhead Overhead
3 1531 1.83 0.81 lt 1 ms 1.87 0.79 lt 1 ms 0.04 2
4 982 2.24 1.22 lt 1 ms 2.33 1.10 lt 1 ms 0.09 4
5 542 2.51 1.52 1.33 ms 2.62 1.32 lt 1 ms 0.11 4
6 432 3.08 1.74 6.56 ms 3.36 1.49 lt 1 ms 0.28 9
7 447 3.77 2.00 25.52 ms 4.09 1.73 lt 1 ms 0.32 8
8 350 4.11 2.32 122.97 ms 4.56 1.93 lt 1 ms 0.45 11
9 340 4.67 2.60 719.90 ms 5.24 2.17 lt 1 ms 0.57 12
10 199 5.04 2.93 4.53 s 5.76 2.45 lt 1 ms 0.69 14
11 170 5.47 3.20 31.77 s 6.29 2.59 lt 1 ms 0.82 15
12 31 4.58 3.23 3.67 min 4.87 2.58 lt 1 ms 0.29 6
13 6 6.84 3.17 29.93 min 7.83 2.83 lt 1 ms 0.99 14
14 1311 -- -- -- 8.11 3.05 lt 1 ms -- --
15 1184 -- -- -- 8.67 3.32 lt 1 ms -- --
20 928 -- -- -- 11.09 4.70 lt 1 ms -- --
25 691 -- -- -- 13.93 5.97 1.86 ms -- --
35 354 -- -- -- 19.63 8.26 4.82 ms -- --
45 165 -- -- -- 25.43 10.62 13.28 ms -- --
16
Conclusions and Future Work
  • Developed synthesis tool that
  • Converts eBlocks network to minimum number of
    programmable nodes
  • With accompanying C code
  • Uses new partitioning heuristic that is fast and
    near-optimal
  • Present/Future Work
  • Variety of programmable blocks
  • Also consider more criteria (i.e. input/output,
    cost, power, delay)
  • Introduce higher-level eBlocks for more powerful
    capture
  • Apply tool to real applications
  • Pro-active healthcare (w/ Intel)
  • Agricultural monitoring (w/ Isca)
  • Environment monitoring (w/ UCR/UCLA)

17
  • Thank you for your attention.
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