Engineered Substrates for High-Mobility MOSFETs

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Engineered Substrates for High-Mobility MOSFETs
Nathan Cheung Dept of EECS,
UC-Berkeley cheung_at_eecs.berkeley.e
du GSR Eric Liu and
Vorrada Loryuenyong
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OUTLINE

• Motivations for SOI, SSOI, and GeOI substrates
• Layer Transfer Technologies
• - Epitaxial Growth and Implantation
• - Plasma Activated Bonding
• - Delamination
• - Post-Delamination Surface Smoothing
• FLCC Research
• - GeOI layer transfer
• - Transfer Thickness Mechanisms
• - Thermal-Mechanical Stress Analysis

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Various mobility enhancement device structures
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Layer Transfer Approaches
Splitting By Internal Force
H
H peak
Donor wafer
SiO2
Handle wafer
Wafer bonding
Thermal exfoliation gt 400C
M.K. Bruel, Electron. Lett. 31, 1201 (1995).
Splitting By External Force
Mechanically weakened Layer
SiO2
Handle wafer
Wafer bonding
Edge initiated crack propagation
En et al, SOI Conference Proc, 163
(1998) Yonehara et al, APL, 64, 2104 (1994)
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Direct Wafer Bonding
Chemical Cleaning HF, H2SO4, H2O2
IR Transmission Image Through a Bonded Pair
Plasma exposure
Room temperature bonding
Complete bonding over 4 inch diameter
Annealing
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Delamination Methods
(1) Exfoliation of implanted hydrogen SOITEC,
Amberwave
(2) Cleavage along implant damage region (gas
jet) Sigen
(3) Mechanical rupture of Porous Si (water jet)
Canon
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Layer Transfer Theory Bonding strength gt
Cutting layer strength
Strengths of Bonding and Cutting Layers
Separation Modes
No transfer
Partial transfer
Full transfer
?i surface energy of interface i
Donor Si
Donor Si
Donor Si
SiO2
Receptor Si
Receptor Si
Receptor Si
SiO2
Transferred Si
1 cm
gcut gt gbond gcut gbond gcut lt
gbond
Cho et al, J. Phys. Lett., 92, 5980 (2003)

• Full transfer requires a full strength at the
  bonding interface layer
• Non-uniform bonding induces partial transfer

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Advantages of Layer Transfer Approach

• Donor wafer can be recycled
• Transferred thickness and buried oxide thickness
• are independently controlled
• (100), (110), and (111) Epi layers can be
  transferred
• Multi-stack structures can be achieved with
  various epi
• and transfer combinations

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Some state-of-the-art results
Sigen
Canon
Amberwave
300mm SOI
50nm Si range1.2nm
SOITEC
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Why transfer of Epi Donor Wafers ?

• For SOI, Epi Si has less COP defects than bulk
  Si
• For GeOI, no 300mm Ge bulk wafers yet
• For s-SOI and SGOI , layer formed epitaxially on
  SiGe buffer layers

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Plasma Activated Bonding
PLASMA
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Si/SiO2 Bonding Energy vs. Temperature
Si (100) Fracture Strength
Cho et al, UCB, 2000.
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Requirements for Direct Bonding

• Surface micro-roughness nm
• No macroscopic wafer warpage
• Minimal particle density and size
• - soft particle size lt 0.2 um

Deposited films will need CMP
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Surface Smoothing by Hydrogen anneal
As-split surface
After-anneal surface
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Hydrogen Induced Thermal Separation rms 8.5 nm
NanoCleave? rms 0.8nm
Current et al, European Semiconductor, Feb 2000
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Ultra-Thin (lt1KÅ tSOI) Non-Uniformity
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Ge/Si3N4/Si and Ge/SiO2/Si substrates by ion-cut
Ge donor wafer
Si Substrate
Implanted Hydrogen
GeOI
Ge/Si3N4/Si
Fabrication Method Processing Temp (ºC) Transfer thickness (nm) Mobility (as-cut) cm2/V-sec Bulk 300 cm2/V-sec
Ge/Si3N4/Si Mechanical Ion Cut 205 439 240
Ge/Si3N4/Si Thermal Ion Cut 250 450 280
Ge/SiO2/Si Thermal Ion Cut 270 410 252
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Ge/Si3N4/Si surface roughness by AFM
(b)GeOI by thermal cut Tcut360C, RMS 20.5nm
(a)GeOI by mechanical cut Tanneal205C, RMS
17.5nm
(Size of AFM images 5x5µm2 H ion dose 6x1016
/cm2.)

• GeOI transfer surface roughness gt SOI transfer
  surface
• roughness (RMSlt7 nm)
• Post-transfer smoothing is required

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Ge/SiO2/Si by thermal ion-cut

• Fabrication processes
• Oxygen plasma activation
• for 15sec
• Direct bonding
• Post-bonding annealing
• 130C for 20h
• 220 C for 10h
• Thermal-cut at Tgt270 C

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Ge/SiO2 (or Si3N4)/Si system by ion-cut shows
that the cutting depth is deeper than the
implantation zone !
Si
Ge
Ideal crack propagation
?
Pgas
Thermal Cut
Mixed-mode crack propagation
?
Pgas
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Data is obtained in courtesy of ZhengXin Liu
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What controls Transfer Layer thickness ?
SOI H 175 keV 5.0 x 1016 cm-2 600C
Ion-cut location
29 nm
100
011
Höchbauer et al, J. Appl. Phys, 89, 5980 (2001)

• Ion-cut take place at shallower depth than the
  center of the hydrogen platelet distribution
• The ion-cut location is found to occur at the
  depth of maximum damage.

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Transfer thickness of Ion-Cut is different with
substrate stress
Implanted Si (100) H 8 ? 1016 cm-2 28 keV
Transferred layer of implanted Si is thicker
than non-implanted Si
Si (100)
Small Area Transfer
Large Area Transfer
H Peak
Implanted Si (100) Thickness
Non-implanted Si (100) thickness
Si
Thickness (?m)
Transferred Si
Transferred Si
Top views of transferred layers
Distance (?m)
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Transfer Thickness versus Implantation Dose
Thickness Measurement Data
Stress Measurement Data


0
so
-100
SU-8
-200
-300
Si

-400
Compressive Stress (Mpa)

-500
-600
-700
-800
0
2
4
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Implantation dose ? 1016 cm-2

• Transferred thickness is a function of ion
  implantation dose
• Compressive stress induced by implantation was
  determined by measuring wafer curvature
• Compressive stress leads to additional shear
  forces at the crack tip

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Layer Transfer Without Hydrogen Implantation
SiO2
Si (100)
Si (111)

• Crack tends to propagate into brittle substrate
• Crack propagation driving force is inversely
  proportional to fracture toughness of materials.
• Si(100)1 0.91 MPa?m1/2
• Si(111)1 0.82 MPa?m1/2
• SiO22 0.7-0.8 MPa?m1/2
• Non-uniform thermal stress result in
  non-uniformity of the transferred surface

Full Transfer
Partial Transfer
Transfer
Donor Si
SiO2
SU-8
Glass
Glass
Glass
Original donor wafer
SiO2 on SU-8
SU-8
SU-8
1 cm
Transferred Si
Top views of transferred layers
1Chen et al., American Ceramic Society Bulletin,
59, 469 (1980) 2Lucas et al., Scripta
Metallurgica et Materialia, 32, 743 (1995)
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Layer Transfer A Mechanical Fracture
Perspective

• Stress intensity factors
• Effect of KII on KI crack propagation loading

Desired condition for uniform layer transfer
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Transferred Thickness
Experimental Data vs. Analytical Data
Analytical Model
M
Film
h
d
P
?h
?h
Neutral plane
Substrate
Substrate
?
KII 0
S Efilm/Esubstrate
Ki Stress intensity factor (mode i) ?o
Thermal stress I Moment of inertia of the
transferred beam
Model by Drory et al, Acta Metall., 36, 2019
(1988)
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Derailing Mechanism of Mixed-Mode Crack
Propagation
Map of Failure Mechanism
Mixed-Mode Crack Propagation
1.0
Substrate cracking
No cracking
Partial cracking
Steady state cracking
Normalized interfacial toughness, ?i2/?o2h
0.5
Interfacial delamination
Stress intensity factor of the kink crack
inclined at ? to the main crack
2
0
1
Normalized substrate toughness, ?S2/?o2h
Where kI and kII are the stress intensity factors
acting on the main crack and,

• Interfacial delamination
• Partial substrate cracking
• Steady state substrate cracking

Thouless et al. (1991)
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Thermal Stress Simulation of Ge-SiO2-Si systems
by finite element analysis
y
(800 C) Annealing
Ge (100 nm)
Ge
SiO2 (100 nm)
SiO2
x
Si (500 µm)
Si

• Ge layer has a tendency to buckle due to the
  compressive direct stress.
• The interfacial stress may exceed the fracture
  tensile strength of SiO2 (approximately 110MPa)

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Thermal Stress Simulation of Patterned
Ge-SiO2-Si systems by finite element analysis
Max Direct Stress sxx (MPa)
50nm
w (nm)
500ºC
Direct Stress sxx distribution after annealing
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Impact of Fin Orientation
Source Professor T-J. King (UCB)
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Manufacturing Equipment Issues

• High-throughput, low-cost Epi Reactors
• CMP or smoothing of SiGe and s-Si
• High Current Hydrogen implanters
• Plasma Activated Bonders
• Mechanical Delamination Machines

H Plasma Implanter
Plasma Bonder
Gas Jet Delamination
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Summary

• Ultra-thin (lt10nm) SOI, GeOI, and s-SOI pose new
  challenges to meet stringent uniformity and
  roughness specifications
• Mechanical stress distribution (bonding-induced
  and implantation-induced) are key factors in
  transfer thickness control.
• Improved process recipes are needed to ensure
  thermal stability of sSOI and GeOI structures
• Challenges for process control , metrology, and
  low-cost manufacturability