Lecture 10 Circuit Analysis Procedure

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Lecture 10Circuit Analysis Procedure
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Overview

• Hazards
• Glitches
• Important concept analyze digital circuits
• Given a circuit
• Create a truth table
• Create a minimized circuit
• Approaches
• Boolean expression approach
• Truth table approach
• Leads to minimized hardware
• Provides insights on how to design hardware

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Gate Delays

• When the input to a logic gate is changed, the
  output will not change immediately.
• The switching elements within a gate take a
  finite time to react to a change (transition) in
  input.
• As a result the change in the gate output is
  delayed w.r.t. to the input change.
• Such delay is called the propagation delay of the
  logic gate (tp)
• The propagation delay for a 0 to 1 output change
  (tpLH) may be different than the delay for a 1 to
  0 change (tpHL).

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Gate Delays (contd)
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Important Terms (timing)

• Gate delay time for change at input to cause
  change at output
• min delay typical/nominal delay max delay
• careful designers design for both worst case and
  best case
• Rise time time for output to transition from
  low to high voltage
• Fall time time for output to transition from
  high to low voltage
• Pulse width time that an output stays high or
  stays low between changes

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Effect of gate delays

• The analysis of combinational circuits ignoring
  delays can predict only the steady-state behavior
  of a circuits.That is they predict a circuits
  output as a function of its inputs under the
  assumption that the inputs have been stable for a
  long time, relative to the delays into the
  circuits electronics.
• Because of circuit delays, the transient behavior
  of a combinational logic circuit may differ from
  what is predicted by a steady-state analysis.
• In particular a circuits output may produce a
  short pulse (often called a glitch) at a time
  when steady state analysis predicts that the
  output should not change.

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Hazards and Glitches

• A glitch is an unwanted pulse at the output of a
  combinational logic network a momentary change
  in an output that should not have changed.
• A circuit with the potential for a glitch is said
  to have a hazard.
• In other words a hazard is something intrinsic
  about a circuit a circuit with hazard may or may
  not have a glitch depending on input patterns and
  the electric characteristics of the circuit.
• When do circuits have hazards ?
• Hazards are potential unwanted transients that
  occur in the output when different paths from
  input to output have different propagation delays.

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Circuit Analysis

• Analyze a logic circuit to determine its
  behavior.
• For a two-level circuit, the analysis process is
  simple.
• Boolean expression can often be written by
  inspection.
• For multi-level circuits, the process is more
  complex.
• Cannot write a Boolean expression by inspection.
• Must follow a procedure to implement the
  analysis.

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Relationship Among Representations
Any Boolean function that can be expressed as a
truth table can be written as an expression in
Boolean Algebra using AND, OR, NOT.
How do we convert from one to the other?
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Logic circuits

• Logic circuits for digital systems may be
  combinational or sequential.
• Combinational circuit consists of logic gates
  whose outputs at any time are determined directly
  from the present combination of inputs without
  regard to previous inputs.
• Combinational circuit performs a specific
  information-processing operation fully specified
  logically by a set of Boolean functions.

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Sequential circuits

• Sequential circuits employ memory elements
  (binary cells) in addition to logic gates.
• Their outputs are a function of the inputs and
  the state of the memory elements.
• The state of memory elements, in turn, is a
  function of previous inputs.
• As a consequence, the outputs of a sequential
  circuit depend not only on present inputs, but
  also on past inputs,
• the circuit behavior must be specified by a time
  sequence of inputs and internal states.

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Basic Combinational Logic Circuits

• AND-OR logic
• AND-OR logic produces an SOP expression.
• In general, an AND-OR circuit can have any number
  of AND gates each with any number of inputs.

SOP
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Basic Combinational Logic Circuits
inputs inputs inputs inputs AB CD o/p
A B C D AB CD X
0 0 0 0 0 0 0
0 0 0 1 0 0 0
0 0 1 0 0 0 0
0 0 1 1 0 1 1
0 1 0 0 0 0 0
0 1 0 1 0 0 0
0 1 1 0 0 0 0
0 1 1 1 0 1 1
1 0 0 0 0 0 0
1 0 0 1 0 0 0
1 0 1 0 0 0 0
1 0 1 1 0 1 1
1 1 0 0 1 0 1
1 1 0 1 1 0 1
1 1 1 0 1 0 1
1 1 1 1 1 1 1
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Combinational circuit

• A combinational circuit consists of
• input variables,
• logic gates,
• output variables.
• The logic gates accept signals from the inputs
  and generate signals to the outputs.
• This process transforms binary information from
  the given input data to the required output data.
• Obviously, both input and output data are
  represented by binary signals,

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Combinational-Circuit Analysis

• Combinational circuits -- outputs depend only on
  current inputs (not on history).
• Kinds of combinational analysis
• exhaustive (truth table)
• algebraic (expressions)
• simulation / test bench
• Write functional description in HDL
• Define test conditions / test vectors, including
  corner cases
• Compare circuit output with functional
  description (or known-good realization)
• Repeat for random test vectors

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Combinational-Circuit Design

• Sometimes you can write an equation or equations
  directly using logic (the kind in your brain).
• Example (alarm circuit)
• Corresponding circuit

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Alarm-circuit transformation

• Sum-of-products form
• Useful for programmable logic devices (next lec.)
• Multiply out

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The Problem

• How can we convert from a circuit drawing to an
  equation or truth table?
• Two approaches
• Create intermediate equations
• Create intermediate truth tables

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Label Gate Outputs

• Label all gate outputs that are a function of
  input variables.
• Label gates that are a function of input
  variables and previously labeled gates.
• Repeat process until all outputs are labelled.
• By repeated substitution of previously defined
  functions, obtain the output Boolean functions in
  terms of input variables.

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Approach 1 Create Intermediate Equations

• Step 1 Create an equation for each gate output
  based on its input.
• R ABC
• S A B
• T CS
• Out R T

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Approach 1 Substitute in subexpressions

• Step 2 Form a relationship based on input
  variables (A, B, C)
• R ABC
• S A B
• T CS C(A B)
• Out RT ABC C(AB)

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Approach 1 Substitute in subexpressions

• Step 3 Expand equation to SOP final result
• Out ABC C(AB) ABC AC BC

C
Out
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Approach 2 Truth Table

• Step 1 Determine outputs for functions of input
  variables.

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Approach 2 Truth Table

• Step 2 Determine outputs for functions of
  intermediate variables.

A 0 0 0 0 1 1 1 1
B 0 0 1 1 0 0 1 1
C 0 1 0 1 0 1 0 1
T S C
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Approach 2 Truth Table

• Step 3 Determine outputs for function.

R T Out
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Circuit Analysis More Difficult Example

• Note labels on interior nodes
• Multiple inputs (3) Multi-output (2)

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To obtain FI as a function of A, B and C we form
a series of substitutions as follows
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More Difficult Example Truth Table

• Remember to determine intermediate variables
  starting from the inputs.
• When all inputs determined for a gate, determine
  output.
• The truth table can be reduced using K-maps.

A 0 0 0 0 1 1 1 1
B 0 0 1 1 0 0 1 1
C 0 1 0 1 0 1 0 1
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Analysis Procedure

• Boolean Expression Approach

ABC
ABC
AB'C'A'BC'A'B'C
(AB)(AC)(BC)
ABACBC
F1AB'C'A'BC'A'B'CABC F2ABACBC
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Analysis Procedure

• Truth Table Approach

A B C F1 F2
0 0 0







0 0
0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0
0
0
1
0
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Analysis Procedure

• Truth Table Approach

A B C F1 F2
0 0 0 0 0
0 0 1






0 0 1 0 0 1 0 0 0 1 0 1
0 1 0 0 0
1
1 0
1
1
0
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Analysis Procedure

• Truth Table Approach

A B C F1 F2
0 0 0 0 0
0 0 1 1 0
0 1 0





0 1 0 0 1 0 0 1 0 0 1 0
0 1 0 0 0
1
1 0
1
1
0
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Analysis Procedure

• Truth Table Approach

A B C F1 F2
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1




0 1 1 0 1 1 0 1 0 1 1 1
0 1 0 0 1
0
0
0 1
0
1
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Analysis Procedure

• Truth Table Approach

A B C F1 F2
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0



1 0 0 1 0 0 1 0 1 0 0 0
0 1 0 0 0
1
1
1 0
1
0
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Analysis Procedure

• Truth Table Approach

A B C F1 F2
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1


1 0 1 1 0 1 1 0 1 1 0 1
0 1 0 1 0
0
0
0
0 1
1
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Analysis Procedure

• Truth Table Approach

A B C F1 F2
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0

1 1 0 1 1 0 1 1 1 0 1 0
0 1 1 0 0
0
0
0
0 1
1
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Analysis Procedure

• Truth Table Approach

A B C F1 F2
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1
1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1
1
0
0
1
1 1
B B
B B
0 1 0 1
A A 1 0 1 0
C C
C C
B B
B B
0 0 1 0
A A 0 1 1 1
C C
C C
F1AB'C'A'BC'A'B'CABC
F2ABACBC
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Summary

• Important to be able to convert circuits into
  truth table and equation form
• WHY? ---- leads to minimized sum of product
  representation
• Two approaches illustrated
• Approach 1 Create an equation with circuit
  output dependent on circuit inputs
• Approach 2 Create a truth table which shows
  relationship between circuit inputs and circuit
  outputs
• Both results can then be minimized using K-maps.
• Next time develop a minimized SOP representation
  from a high level description