Lecture 15 PicoBlaze Overview

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Lecture 15PicoBlaze Overview
ECE 448 FPGA and ASIC Design with VHDL
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Required reading

• P. Chu, FPGA Prototyping by VHDL Examples
• Chapter 14, PicoBlaze Overview

Recommended reading

• K. Chapman, PicoBlaze for Spartan-6, Virtex-6,
  and 7-Series (KCPSM6)

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FPGA with Soft Processor Core
PicoBlaze
Source The Zynq Book
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Structure of a Typical Digital System
Data Inputs
Control Inputs
Control Signals
Datapath (Execution Unit)
Controller (Control Unit)
Status Signals
Data Outputs
Control Outputs
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Block diagram of a Single-Purpose Processor (FSMD
Finite State Machine with Datapath)
ctrl
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Block diagram of a General-Purpose Processor
(Microcontroller)
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PicoBlaze-3
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PicoBlaze-3 Overview
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PicoBlaze-6 Overview
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PicoBlaze-6 Overview
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Size of PicoBlaze-6 in Spartan 6
Make an educated guess

• Resource Utilization in CLB Slices
• ?
• Number of PicoBlaze-6 cores fitting inside of the
  Spartan-6
• FPGA (XC6SLX16) used on the Nexys3 FPGA
  board
• ?

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Size of PicoBlaze-6 in Spartan 6

• Resource Utilization in CLB Slices
• 26 CLB Slices
• 1.1 of Spartan-6 used in Nexys3
• Number of PicoBlaze-6 cores fitting inside of the
  Spartan-6
• FPGA (XC6SLX16) used in the Nexys3 FPGA
  board
• 87 PicoBlaze cores

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Speed of PicoBlaze-6 in Spartan 6
Make an educated guess

• Maximum Clock Frequency
• ?
• Maximum number of instructions per second
• ?

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Speed of PicoBlaze-6 in Spartan 6

• Maximum Clock Frequency
• 105 MHz
• Maximum number of instructions per second
• 52.5 millions of instructions per second (MIPS)

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Register File of PicoBlaze-3
2
3
4
5
6
7
sF
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Register File of PicoBlaze-6

• Instructions
• REGBANK A
• REGBANK B
• used to switch between banks
• Only one set of flags
• Z, C, I
• Very useful for
• interrupt service routines

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Definition of Flags
Flags are set or reset after ALU operations
Zero flag - Z
zero condition
Z 1 if result 0 0
otherwise
overflow, underflow, or various conditions
Example C 1 if result gt 28-1
(for addition) or
result lt 0 (for subtraction) 0
otherwise Applies only to addition or
subtraction related instructions, refer to the
following slides otherwise
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Interface of PicoBlaze-3
KCPSM constant (K) coded programmable state
machine
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Interface of PicoBlaze-3
Name Direction Size Function
clk input 1 System clock signal.
reset input 1 Reset signal.
address output 10 Address of the instruction memory. Specifies address of the instruction to be retrieved.
instruction input 18 Fetched instruction.
port_id output 8 Address of the input or output port.
in_port input 8 Input data from I/O peripherals.
read_strobe output 1 Strobe associated with the input operation.
out_port output 8 Output data to I/O peripherals.
write_strobe output 1 Strobe associated with the output operation.
interrupt input 1 Interrupt request from I/O peripherals.
interrupt_ack output 1 Interrupt acknowledgment to I/O peripherals
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Interface of PicoBlaze-6
Name Direction Size Function
clk input 1 System clock signal.
reset input 1 Reset signal.
address output 12 Address of the instruction memory. Specifies address of the instruction to be retrieved.
instruction input 18 Fetched instruction.
port_id output 8 Address of the input or output port.
in_port input 8 Input data from I/O peripherals.
read_strobe output 1 Strobe associated with the input operation.
out_port output 8 Output data to I/O peripherals.
write_strobe output 1 Strobe associated with the output operation.
interrupt input 1 Interrupt request from I/O peripherals.
interrupt_ack output 1 Interrupt acknowledgment to I/O peripherals
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Interface of PicoBlaze-6
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Additional Ports of PicoBlaze-6
Name Direction Size Function
bram_enable output 1 Read enable for the program memory. This signal should be connected to the enable input of the program memory and is used to reduce the power consumption associated with the BRAM(s).
k_write_strobe output 1 This output will pulse High for one clock cycle when KCPSM6 executes an OUTPUTK instruction and the peripheral logic should capture the data provided on out_port into the intended destination defined by the value of port_id30. Note that only the lower 4-bits of port_id are used during OUTPUTK.
sleep input 1 Active High sleep control. When driven High KCPSM6 will complete the current instruction and then enter a sleep mode in which all activity stops. Whilst in the sleep mode all strobes are inactive and the bram_enable is Low to disable the program memory resulting in minimum power consumption. All inputs except reset are ignored. When sleep is returned Low, KCPSM6 resumes execution from the point that it stopped.
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Generics of PicoBlaze-6
Name Default Range Function
hwbuild X00 X00..XFF can be used to define any 8-bit value in the range 00 to FF. It is then possible to load any KCPSM6 register with this value using the HWBUILD sX instruction
interrupt vector X3FF X00..XFFF When an interrupt occurs (and interrupts are enabled) then KCPSM6 inserts and executes a special form of CALL instruction to a fixed address known as the interrupt vector. By default this address is 3FF (the last location of a 1K program memory).
scratch_pad_memory_size 64 64, 128, 256 Size of the scratch pad memory. Increasing the default size to 128 (256) bytes, increases the resource utilization by 2 slices (6 slices).
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PicoBlaze-6 Instantiation
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Development Flow of a System with PicoBlaze
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PicoBlaze-3 Programming Model
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PicoBlaze-6 Programming Model
Bank B
Bank A
FFC FFD FFE FFF
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Syntax and Terminology
Syntax Example Definition
sX KK PORT(KK) PORT((sX)) RAM(KK)
s7 ab PORT(2) PORT((sa)) RAM(4)
Value at register 7 Value ab (in hex) Input value
from port 2 Input value from port specified by
register a Value from RAM location 4
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Addressing modes
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PicoBlaze ALU Instruction Set Summary (1)
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PicoBlaze ALU Instruction Set Summary (2)
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PicoBlaze ALU Instruction Set Summary (3)