BIOS and DOS Interrupts

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BIOS and DOS Interrupts

• Basic Input /Outpu System
• Disk Operating System

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Computer Interrupt
Interrupt request a signal that immediate
attention is needed Interrupt processing
what CPU does in response to request Interrup
t service what is done in software as a result
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Computer Interrupt

• 2 General Types of Interrupts
• External - generated outside CPU by other
  hardware
• Internal - generated within CPU as a result of
  instruction or operation
• - x86 internals int, into, divide error,
  and single step
• - trap generally means any processor
  generated interrupt
• in x86, usually means the single step
  interrupt
• x86 Terminology for Interrupts
• 1) Hardware Interrupt External, uses INTR and
  NMI control bus lines
• 2) Software Interrupt Internal, from int or
  into
• 3) Processor Interrupt traps, exceptions

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8086/8088 Pinout Diagrams
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8086 External Interrupt Connections
NMI - Non-Maskable Interrupt INTR - Interrupt
Request
Programmable Interrupt Controller (part of
chipset)
NMI Requesting Device
NMI
8086 CPU
Intel 8259A PIC
INTR
Interrupt Logic
Single Step
int
into
Divide Error
Software
Traps
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Interrupt Vector Table IVT (in memory)

• x86 has 256 interrupts, specified by Type Number
  or Vector
• 1 byte of data must accompany each interrupt
  specifies Type
• Vector is a pointer (address) into Interrupt
  Vector Table, IVT
• IVT is stored in memory from 00000000 to
  000003ffh
• IVT contains 256 far pointer values (addresses)
• Far pointer is CSIP values
• Each far pointer is address of Interrupt Service
  Routine, ISR
• Also referred to as Interrupt Handler
• When interrupt is requested, which IVT entry?
  Type!

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IVT Format
00000000
Offset
00000001
IP LSB IP MSB
Interrupt 0
00000002
Segment
00000003
CS LSB CS MSB
00000004
Offset
00000005
Interrupt 1
00000006
Segment
00000007
Given a Vector, where is the ISR address stored
in memory ?
000003fc
Offset
Example int 36h Offset (54?4) 216
00d8h
000003fd
Interrupt 255
000003fe
Segment
000003ff
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What Happens During an Interrupt ?
push Flags
Complete Current Instruction
Internal Interrupt
TFTEMP
Set TEMPTF
YES
NO
pop IP and CS
IF0 TF0
NMI
YES
NO
INTR
IF
push CS and IP
popf
YES
1
0
NO
TF
acknowledge interrupt
Resume Interrupted Procedure
call ISR
1
0
Read Type Code
Fetch Next Instruction
NMI
YES
NO
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Similarity to Subroutine Procedure

• call ? int
• ret ? iret
• call pushes CS, IP and loads CSIP with address
  of subroutine
• int does what call does and more
• ret pops IP, CS
• iret pops FLAGS, IP, and CS
• This is why ALL programs MUST have a stack
  segment, so that interrupts can be handled

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halt Instruction

• This instruction causes processor to enter a
  HALT state
• HALT state is one where no further instructions
  are fetched nor executed until one of the
  following events occurs
• 1) System is reset - rising edge on RESET pin
• 2) External interrupt occurs

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Interrupt Vector Assignments
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Interrupt Vector Assignments (cont.)
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AT IRQ DefinitionsIBM-AT (Advanced Technology)
- Intel 80286
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Interrupt Service Routines

• ALL Interrupts
• Interrupts for Inpu
• Interrupts for Output

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Interrupts for Inpu

• INT 16h / AH 00h - get keystroke from keyboard
  (no echo)
• INT 16h / AH 01h - check for keystroke in the
  keyboard buffer
• INT 21h / AH1 - read character from standard
  input, with echo
• INT 21h / AH6 - direct console input or output
• INT 21h / AH7 - character input without echo to
  AL
• INT 21h / AH0Ah - input of a string
• INT 21h / AH0Bh - get input status

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Interrupts for Output

• INT 21h / AH2 - write character to standard
  output
• INT 21h / AH9 - output of a string

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HW1

• Develop an assembly program that receives a
  decimal number (up to max 100 digits) from user
  and displays its hexadecimal equivallent.
• Due Date Sunday Esfand 23rd
• Mail to Mr Kazari and me (vahdat_at_sharif.edu or
  vosoughivahdat_at_yahoo.com)
• Subject HW1 UPI2010 IDxxxxxxxx