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EE 261 Introduction to Logic Circuits

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Closed-book, closed-notes, you will be allowed a 1-page cheat sheet. 2 Lecture #15 ... Codes - BCD, Gray, ASCII, Parity. Chapter 3 Topics - Truth Tables - Logic Gates ... – PowerPoint PPT presentation

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Title: EE 261 Introduction to Logic Circuits


1
EE 261 Introduction to Logic Circuits
  • Lecture 15
  • Agenda
  • CMOS Dynamic Behavior (Noise)
  • Exam Review
  • Announcements
  • Exam 1, Wednesday, (10/08/08)- Closed-book,
    closed-notes, you will be allowed a 1-page cheat
    sheet.

2
CMOS Dynamic Behavior
  • Simultaneous Switching Noise (SSN)- What
    happens when we switch logic levels with a
    capacitive load?- the
    capacitor looks like a short at AC (or when
    transitioning)

VDD
S
PMOS ON
G
S
D
IL
CL
G
NMOS OFF
S
GND
3
CMOS Dynamic Behavior
  • Simultaneous Switching Noise (SSN)- this causes
    a large instantaneous current to be drawn from
    the power supply- the power supply cannot
    supply this sudden change in current because it
    has a much slower response- we can think of
    the power supply as a large capacitor that stores
    our charge. The interconnect that supplies
    this charge to our device tends to be inductive
    and resistive.- when we draw current quickly
    through the interconnect, there is voltage
    drop- as a result, the power supply voltage
    will begin to "droop" as seen by our device

4
CMOS Dynamic Behavior
  • Simultaneous Switching Noise (SSN)- "Decoupling
    Capacitors"- we can put decoupling (or bypass)
    capacitors near our device to provide the faster,
    instantaneous current draw due to switching
    logic levels.

RL
VDD
PMOS ON
CDecoupling
S
G
S
D
IL
CL
G
NMOS OFF
S
GND
5
CMOS Dynamic Behavior
  • Simultaneous Switching Noise (SSN)- "Ground
    Bounce"- when the interconnect on the IC is
    inductive, we will get a voltage drop when
    instantaneous current is drawn. VL L
    (di/dt)- this causes the VDD (or GND) on-chip
    to be different from the VDD (or GND) in the
    system.- this is called "Ground Bounce" -
    this leads to inadvertent switching of logic
    circuits- this problem becomes more sever when
    multiple signals share the same VDD or GND pin

VDD
L
VL -
PMOS ON
S
G
S
D
IL
CL
G
NMOS OFF
S
GND
6
Exam Review
  • Chapters 1 2 Topics- digital vs analog
    (digital revolution)- systems bases-
    system conversions - to from decimal - to
    and from binary/oct/hex- binary arithmetic -
    addition (carries) - subtraction (borrows)-
    negative 's in binary - Signed Magnitude -
    2's Complement - 1's Complement- 2's
    complement arithmetic - complement add -
    range overflow - Codes - BCD, Gray, ASCII,
    Parity
  • Chapter 3 Topics- Truth Tables- Logic Gates-
    Simple Logic Circuits- Timing Diagrams-
    MOSFETS - NMOS, PMOS, CMOS- CMOS Inverter-
    CMOS NAND- CMOS NOR- CMOS AND,OR,BUF- CMOS
    Static Behavior - Input Specs - Output Specs
    - Noise Margin - Leakage - Resistive Loads
    - Fan-In / Fan-Out - Latch-Up- CMOS Dynamic
    Behavior - transition time / propagation delay
    - power consumption (SC Load) - Decoupling
    - Ground Bounce / SSN
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