Logic Circuits and Computer Architecture

1
Logic Circuits and Computer Architecture

• Appendix A
• Digital Logic Circuits
• Part 1 Combinational Circuits
• and Minimization

2
Digital System

• Takes a set of discrete information inputs and
  discrete internal information (system state) and
  generates a set of discrete information outputs

3
Basic circuits

• Combinational
• without memory, stateless
• Output Function(Input)
• Sequential
• with memory, state dependent behaviour
• State Function (State, Input)
• Output Function (State) or Function (State,
  Input)
• It can be
• Synchronous state updated at discrete times
• Asynchronous State updated at any times

4
Digital System Example
A
B
Combinational Circuit
Inputs
Representation of A and B

A B
Outputs
Representation of A B

5
Digital System Example
A Digital Counter (e. g., odometer)
Count Up
1
3
0
0
5
6
4
Reset
Inputs
Count Up, Reset

Outputs
Visual Display

State
"Value" of stored digits


6
Information Representation - Signals

• Information variables represented by physical
  quantities (signals) 
• For digital systems, the variables take on
  discrete values
• Two level, or binary values are the most
  prevalent values in digital systems 
• Binary values are represented abstractly by
• digits 0 and 1
• words (symbols) False (F) and True (T)
• words (symbols) Low (L) and High (H)
• and words On and Off
• Binary values are represented by values or ranges
  of values of physical quantities

7
Signal Examples Over Time
Time
Continuous in value time
Analog
Digital
Discrete in value continuous in time
Asynchronous
Discrete in value time
Synchronous
8
Signal Example Physical Quantity Voltage
Threshold Region
9
Binary Values Other Physical Quantities

• What are other physical quantities represent 0
  and 1?
• CPU
• Disk
• CD
• Dynamic RAM

voltage
Magnetic Field Direction
Surface Pits/Light
Electrical Charge
10
Information processing

• by means of boolean gates
• a boolean gate implements simple boolean
  operations (see later)
• basic gates
• AND, OR, NOT
• gates are used to build circuits

11
Number Systems Representation Positive radix,
positional number systems

• A number with radix r is rapresented by a string
  of digits
• Aan-1an-2a1a0 .a-1,a-2,,a-m
• 0 ? ai lt r
• . is the radix point
• Its (decimal) value is

12
Number Systems Examples
powers of radix
13
Case r 2

• Let Aan-1an-2a1a0 .a-1,a-2,,a-m be a string of
  bit (binary digit)
• Its (decimal) value is

Example 1001.1011 23 20 2-1 2-3 2-4
9.6875
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Decimal r 10
Binary r 2
Octal r 8
Hexadecimal r 16
00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15
00 01 02 03 04 05 06 07 10 11 12 13 14 15 16 17
0 1 2 3 4 5 6 7 8 9 A B C D E F
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001
1010 1011 1100 1101 1110 1111
15
Decimal to binary conversion

• Represent (111.6875)10 in pure binary
• Idea
• Convert the integer part into ?
• Convert the fractional part into ?
• Result ?.?

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Conversion of integer part

• Represent (111)10 in pure binary
• Repeat division by 2
• 1112 55 remainder 1
• 552 27 remainder 1
• 272 13 remainder 1
• 132 6 remainder 1
• 62 3 remainder 0
• 32 1 remainder 1
• 12 0 remainder 1
• RESULT 1101111
• N.B. Result bits are produced in reverse order

Least Significant Bit (LSB)
Most Significant Bit (MSB)
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Conversion of fractional part

• Iterate multiplication taking the integer parts
• Binary representation for 0.6875 ?
• 0.6875 x 2 1.375 take 1
• 0.375 x 2 0.75 take 0
• 0.750 x 2 1.5 take 1
• 0.5 x 2 1.0 take 1
• Result 0.1011
• N.B. Result bits here are produced MSB to LSB
• the procedure sometimes does not converge
• stop when the desired precision is reached

MSB
LSB
(111.6875)10 (1101111.1011)2
18
Boolean Algebra

• A useful mathematical system for specifying and
  transforming logic functions
• We study Boolean algebra as a foundation for
  designing and analyzing digital systems!
• Named from George Boole

19
George Boole (1815-1864)
An Investigation of the Laws of Thought, on
Which are founded the Mathematical Theories of
Logic and Probabilities (1854)
20
Claude Shannon (1916-2001)
A Symbolic Analysis of Relay and Switching
Circuits (1938)
ENIAC (Electronic Numerical Integrator And
Calculator) (1946)
21
Boolean Algebra

• Boolean Algebra deals with
• Binary variables take on one of two values.
• Logical operators operate on binary values and
  binary variables
• the two binary values have different names
• True/False
• On/Off
• Yes/No
• 1/0
• Basic logical operators are the logic functions
  AND, OR and NOT
• Logic gates implement logic functions

22
Logical Operations

• The three basic logical operations are
• AND , OR, NOT
• AND is denoted by a dot ().
• OR is denoted by a plus ().
• NOT is denoted by an overbar ( ), a single
  quote mark (') after, or () before the variable
• Intended meaning (for humans - Laws of Thought)
• AND both inputs are true
• OR at least one input is true
• NOT negate the input

23
Notation Examples

• Examples
• Y A?B is read Y is equal to A AND B.
• z xy is read z is equal to x OR y.
• XA is read X is equal to NOT A.

• Note The statement
• 1 1 2 (read one plus one equals two)
• is not the same as
• 1 1 1 (read 1 or 1 equals 1).

24
Operator Definitions

• Operations are defined on the values "0" and "1"
  for each operator

25
Boolean functions

• Basic logical operators are the boolean functions

f(x1,,xn) 0,1n 0,1
arguments
domain
codomain
26
Formal definition of functions (1)

• By means of truth tables
• Explicit representation of the output for all
  possible combinations of values on its arguments

27
truth table for a 3-variable function

• f(A,B,C) 1 if and only if at least 2 variables
  are equal to 1

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number of rows of a truth table

• 1-variable function
• 2
• 2-variable function
• 4
• 3-variable function
• 8
• n-variable function
• 2n

29
Formal definition of functions (2)

• By means of boolean equation the function is
  specified as boolean expression of its arguments
• boolean equation consists of
• variables
• constants 0 and 1
• boolean operations (AND, OR, NOT)
• parentheses
• M(A,B) (((A)(B)) (AB))
• M (((A)(B)) (AB))

30
Boolean Operator Precedence

• The order of evaluation in boolean expression is
• Parentheses
• NOT
• AND
• OR
• Consequence parantheses appear around OR
  expressions
• Example FA(BC)(CD)

M (((A)(B)) (AB)) M AB AB
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From the boolean formula to truth table

• Explicit case-by-case evaluation
• Example F X YZ

32
Logic gates

• A logic gate implements simple boolean operation
• basic gates
• AND, OR, NOT
• gates are used to build circuits

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NOT gate - the simplest one

• NOT gate - inverts the signal
• If A is 0, X is 1
• If A is 1, X is 0
• A NOT gate is also called an inverter

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AND gate

• Output is 1 if all inputs are 1
• In general, if the AND gate has N inputs, input 1
  AND input 2 AND AND input N must be 1 for the
  output to be 1
• 2-input AND gate

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OR gate

• Output is 1 if at least one input is 1
• In general, if the OR gate has N inputs, input 1
  OR input 2 OR OR input N must be 1 for the
  output to be 1
• 2-input OR gate

36
A more complex example

• 2-input equivalence circuit
• The output is 1 if the inputs are the same
• (i.e., both 0 or both 1)
• Truth table
• Boolean function
• M AB AB

37
Formal definition of functions (3)

• By means of logic circuits
• Combination of logic gates joined by wires

38
Conventions for logic circuits
39
From boolean formula to logic circuit

• Idea bottom-up construction
• Example write the logic circuit for F X YZ

40
A more complex example

• Exercise bluid the logic circuit of the
  following function

F (ABC)D E
41
From logic circuit to

• truth table
• explicit case-by-case computation
• boolean formula
• left-to-right inspection

42
Example

• Write the boolean function and its truth table
  for the following logic circuit

F YXYZXY
XYZ
XY
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Function and Truth Table

• F Y XYZ XY

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One more example

• Write the boolean function and its truth table
  for the following logic circuit

X
XYZ
XYZ

Z
XYZXYZXZ
XZ
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Function and Truth Table

• F XYZ XYZ XZ

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Conversion between representations

• Circuit -gt
• -gt Boolean formula (left-to-right inspection)
• -gt Truth table (explicit case-by-case
  computation)
• Boolean formula -gt
• -gt Circuit (bottom-up construction)
• -gt Truth table (explicit case-by-case evaluation)
• Truth table -gt
• -gt Circuit (through boolean formula)
• -gt Boolean formula (through canonical form see
  later)

47
Boolean Identities
duality principle any algebraic equality remains
true when the operators OR and AND, and the
elements 0 and 1 are interchanged

• 1A A 0A A Identity
• 0A 0 1A 1 Null
• AA A AA A Idempotent
• AA 0 AA 1 Inverse
• AB BA AB BA Commutative
• (AB)C A(BC) (AB)C A(BC) Associative
• ABC (AB)(AC) A(BC) ABAC Distributive
• A(AB) A AAB A Absorption
• (AB) AB (AB) AB De Morgan

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Truth tables to verify De Morgans theorem
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Remark Each equality remains true if you
sobstitute any variable with any expression
Examples
(AB)(ACD) A BCD
(distributive)
((ABC)(DA)) (ABC) (DA)
(De Morgan) A
(BC) DA (De Morgan)
A(BC) DA
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Generalized De Morgans theorems
X1X2Xn X1 X2 Xn
X1 X2 Xn X1X2Xn
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algebraic manipulation
F XYZ XYZ XZ (distributive)
XY(Z Z) XZ (inverse) XY 1
XZ (identity) XY XZ
52
Boolean Algebra Vs Switching Algebra (1)
A Boolean Algebra is a structure A ltA, , ,
, 0, 1gt where

• A is a set
• and are binary operations
• is a unary operation
• 0, 1 ? A

satisfying the following axioms
(i) and are commutative
(ii) 0 and 1 satisfy a1a and a0a, ? a
?A
(iii) and distribute over each other
(iv) for each element a ?A, there exists an
element a ?A such that a
a 1 and aa0
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Boolean Algebra Vs Switching algebra (2)
Switching Algebra is the following boolean algebra
A lt0,1, , , , 0, 1gt
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one more example of boolean algebra
Let U be a finete set
A lt2U, ?, ? , ?, ?, Ugt
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Observation Axioms (i)-(iv) can be used to prove
all the other identities
An example Idempotent X X X
X X (X X)1 (ii)
(X X)(X X) (iv)
X (XX) (iii)
X 0
(iv) X
(ii)
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NAND gate - the negation of AND

• The opposite of the AND gate is the NAND gate
  (output is 0 if all inputs are 1)
• Truth table
• Logic diagram

57
Alternative NAND representations
58
NOR gate - the negation of OR

• The opposite of the OR gate is the NOR gate
  (output is 0 if any input is 1)
• Truth table
• Logic diagram

59
Alternative NOR representations
60
Exercise

• Write the truth table for
• a 3 input NAND gate
• a 3 input NOR gate

61
XOR gate - the exclusive OR

• For a 2-input gate
• Output is 1 if exactly one of the inputs is 1
• Truth table
• Logic diagram
• A ? B AB AB

62
Properties of XOR operator
X ? Y Y ? X
(X ? Y) ? Z X ? (Y ? Z)
X ? 1 X
X ? 0 X
X ? X 0
X ? X 1
X ? Y (X ? Y)
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some interesting algebraic manipulations
(X ? Y) (XY XY) (XY)
(XY) (XY) (XY)
XX XY XY YY
XY XY
X ? Y ? Z (X ? Y)Z (X ? Y)Z
(XY XY)Z (XY XY)Z
XYZXYZXYZXYZ
Notice X ? Y ? Z 1 if an odd number of
arguments is 1
X1 ? ? Xn 1 if an odd number of arguments is
1
64
Universal Gates

• Universal gate a gate type that can implement
  any Boolean function
• How many logical functions with n input?
• With n inputs there are 2(2n ) possible logical
  functions

65
Universal Gates (2)

• AND, OR, NOT can generate all possible boolean
  functions (see later)
• Is it possible to use fewer basic operations?
• AND, NOT are enough !
• OR, NOT are enough !
• Even NAND alone or NOR alone are enough !

66
How NAND simulates AND, OR

• Simulation of NOT ???

67
How NOR simulates AND, OR

• Simulation of NOT ???

68
Gate equivalence

• Any AND, OR, NOT gate can be obtained using just
  NAND gates or just NOR gates
• Consequence any circuit can be constructed using
  just NAND gates or just NOR gates (easier to
  build)

69
Exercise
Transform the following circuit into a circuit
using only NAND gates by replacing each gate
with its equivalent NAND only circuit
70
Equivalence modifications
on any wire, one can introduce a bubble at the
beginning and at the end
71
Exercise

• Write a NAND only logic circuit for the exclusive
  OR function (XOR)
• A ? B AB AB

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Solution (1)

• Truth table initial circuit

73
Solution (2) equivalence transform.
A B A B

• A
• B
• A
• B

A B A B
74
Transforming OR, AND to NAND

• Transform the following circuit

75
Solution
76
Exercise

• Write a NOR only logic circuit equivalent to the
  following circuit

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SOP and POS rapresentations

• It is useful to specify boolean function in a
  particular form
• A literal is a variable in the positive form or
  in the negative
• sum of products (SOP) rapresentation
• it is an OR of AND combinations of literals
• F1AB BC it is a SOP rapresentation
• F2 AB (BC) it is not a SOP rapresentation
• product of sums (POS) rapresentation
• it is an AND of OR combiations of its literals
• F1A(B C)(BA) it is a POS rapresentation
• F2AB BC it is not a POS rapresentation

78
Canonical Form for boolean functions

• It is a standard way of expressing SOP or POS
• It is
• a sum of minterms, for canonical SOP
• a product of maxterms for canonical POS
• A minterm is a product containing all variables,
  either in the positive form or in the negative
  form
• A maxterm is a sum containing all variables,
  either in the positive or in the negative form.
• Examples
• F (ABC) (BC) is not in a POS canonical
  form
• M AB ABC is not in a SOP canonical form

79
Minterms

• Given that each variable may appear normal (e.g.
  X) or complemented (e.g. X), there are 2n
  minterms for n variables
• Example Two variables (X and Y) produce 4
  combinations
• XY
• XY
• XY
• XY
• Thus there are 4 minterms of 2 variables

80
Maxterms

• Given that each variable may appear normal (e.g.
  X) or complemented (e.g. X), there are 2n
  maxterms for n variables
• Example Two variables (X and Y) produce 4
  combinations
• XY
• XY
• XY
• XY
• Thus there are 4 maxterms of 2 variables

81
Maxterms and Minterms

• Examples 2 variable minterms and maxterms
• The index above is important for describing which
  variables in the terms are true and which are
  complemented

82
Standard Order

• Minterms and Maxterms are designated with
  subscript
• The subscript is a numer, corresponding to a
  binary pattern
• The bits in the pattern represent the
  complemented or normal state of each variable
  listed in a standard order
• All the variables will be present in a minterm or
  maxterm and will be listed in the same order
  (usually alphabetically)
• Example For variables A, B, C
• Maxterms (A B C), (A B C)
• Terms (B A C), ACB, and (C B A) are
  NOT in standard order
• Minterms ABC, ABC, ABC
• Terms (AC), BC, and (AB) do not contain
  all variables

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Purpose of the Index

• The index for the minterm or maxterm, expressed
  as a binary number, is used to determine whether
  the variable is shown in the true form or
  complemented form.
• For Minterms
• 1 means the variable is Not Complemented and
• 0 means the variable is Complemented
• For Maxterms
• 0 means the variable is Not Complemented and
  
• 1 means the variable is Complemented

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Minterm and Maxterm Relationship





y
x
y
x
y
x

y


x

• DeMorgan's Theorem
• Two-variable example
• Thus M2 is the complement of m2 and vice-versa.
• Since DeMorgan's Theorem holds for n variables,
  the above holds for terms of n variables
• giving
• Thus Mi is the complement of mi.

y
x


m

y

x


M
2
2
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Boolean function implementation

• Any function can be implemented as the OR of the
  AND combinations of its inputs
• canonical SOP
• Start from the truth table
• For each 1 in the output
• Write its corresponding minterm
• Write these in OR
• MABCABCABCABC
• m3m5m6m7

88
Equivalent Logic Circuit
89
Boolean function implem. (2)

• Any function can be implemented as the AND of the
  OR combinations of its inputs
• canonical POS
• Start from the truth table
• For each 0 in the output
• Write its corresponding maxterm
• Write these in AND
• F(ABC).(ABC).
• (ABC).(ABC).
• (ABC)
• M0M1M4M5M7

90
Example canonical SOP
canonical SOP
F m1 m3 m6 m7 XYZ XYZ XYZ
XYZ
91
Example canonical POS
canonical POS
F M0 M2 M4 M5 (XYZ) (XYZ)
(XYZ) (XYZ)
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Boolean function implem. (4)

• Alternative procedure for POS form
• Complement the table by substituting everywhere a
  0 with a 1 and a 1 with a 0
• Write a SOP form for the complemented table
• Complement the formula by substituting everywhere
  and AND with an OR and an OR with an AND
• Why does it work ?

93
algebraic manipulation
F XYZ XYZ XZ XY(Z Z) XZ
XY 1 XZ XY XZ
a simpler SOP representation leads to a
simpler circuit
94
Circuit Optimization

• Goal To obtain the simplest implementation for a
  given function
• Optimization is a more formal approach to
  simplification that is performed using a specific
  procedure or algorithm
• Optimization requires a cost criterion to measure
  the simplicity of a circuit
• Distinct cost criteria we will use
• Literal cost (L)
• Gate input cost (G)
• Gate input cost with NOTs (GN)

95
Literal cost

• Literal cost the number of literal occurrences
  in a Boolean expression corresponding to the
  logic circuit diagram
• it is equal to the number of inputs of the
  circuit
• Examples
• F BD ABC ACD
• F BD ABC ABD ABC
• F (A B)(A D)(B C D)(BCD)
• Which solution is the best?

L8
L11
L10
96
Gate input cost

• Gate input cost the number of inputs to the
  gates in the circuit corresponding exactly to the
  furmula
• G - inverters not counted, GN - inverters counted
• For SOP and POS equations, it can be found from
  the equation(s) by finding the sum of
• all literal occurrences
• the number of terms excluding single literal
  terms (G)
• optionally, the number of distinct complemented
  single literals (GN)

97
Cost Criteria Example

• F A B C

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Cost Criteria

• F A B C
• L 6 G 8 GN 11
• F (A )( C)( B)
• L 6 G 9 GN 12
• Same function and sameliteral cost
• But first circuit has bettergate input count and
  bettergate input count with NOTs
• Select it!

99
Minimal SOP and POS

• Optimization for two-level (SOP and POS)
  circuits
• minimal SOP
• minimum number of pruduct terms
• minimum number of literals for each product term
• minimal POS
• minimum number of sum terms
• minimum number of literals for each sum term

100
Minimization procedures

• Karnaughs maps (by hand)
• Used to minimize boolean functions of up to 4
  input variables
• Quine-McKluskey (programmable)
• For more variables
• Practical Optimization Espresso
• sub-optimal heuristic method

101
Karnaughs Maps (KM)

• Grid-like representation for boolean functions
• Each cell represents a minterm
• The K-map can be viewed as a reorganized version
  of the truth table
• Minterms with just one variable different
  occupies adjacent cells
• Alternative algebraic expressions for the same
  function are derived by recognizing patterns of
  squares
• Consider only 1s in the representation (focusing
  on a SOP representation)
• IDEA if 2 adjacent cells have a 1 the function
  can be simplified

102
A KM for 2-variable functions

• The generic KM
• Function F XY Function F X Y

103
A KM for 3-variable functions
labels indicate the area of the map where the
corresponding variables are true
104
example
1
1
1
1
105
1
1
1
1
106
1
1
107
An example

• F XYZ XYZ XYZ XYZ

XY(ZZ) XY(ZZ) XY XY

• Idea
• we want to cover all 1s by using rectangles of
  adjacent cells
• each rectangle of 2k adjacent cells (for some k)
  represents a literal
• product term
• bigger rectangles correspond to simpler product
  terms

108
Combining Squares

• By combining squares, we reduce number of
  literals in a product term
• On a 3-variable K-Map
• One square represents a minterm with three
  variables
• Two adjacent squares represent a product term
  with two variables
• Four adjacent terms represent a product term
  with one variable
• Eight adjacent terms is the function of all
  ones (no variables) 1.

109
Circular adjacencies for 3 variables
labels are useful to get the expression correspond
ing to a given rectangle
110
Three-Variable Maps

• Example Shapes of 2-cell Rectangles

y
XY
XZ
YZ
111
Three-Variable Maps

• Example Shapes of 4-cell Rectangles

y
112
Four 1 adjacents
F XYZ XYZ XYZ XYZ YZ(XX)
YZ (XX) YZ YZ Z(YY) Z
113
Exercise (1)

• Which is the minimal SOP expression for function
  F1m3m4m6m7?

114
Solution

• F1 YZ XZ

115
Exercise (2)

• Which is the minimal SOP expression for function
  F2m0m2m4m5m6?

116
Solution

• F2 Z XY

117
An example

• F XYZ XYZ XYZ XYZ

XY(ZZ) XY(ZZ) XY XY

• Idea
• we want to cover all 1s by using rectangles of
  adjacent cells
• each rectangle of 2k adjacent cells (for some k)
  represents a literal
• product term
• bigger rectangles correspond to simpler product
  terms

118
k-cube of 1s

• Is a set of 2k adjacent cells
• 0-cube, 1 cell, a minterm
• 1-cube, 2 adjacent cells
• 2-cube, 4 adjacent cells
• 3-cube, 8 adjacent cells
• .

119
Prime implicants

• a product term P is said to be an implicant for a
  function F if P implies F, i.e. if P is true then
  F is true
• The product term corresponding to a k-cube is an
  implicant
• An implicant is said to be a prime implicant for
  F if it does not imply any other implicant of F
• A prime implicant can be chosen by selecting a
  maximal k-cube, i.e. a k-cube in the KM which is
  not contained in any larger h-cube (hgtk)

120
Minimal representation

• F P1 P2 P3 ...
• has a minimal SOP representation if
• 1. Each Pi is a prime implicant
• 2. There is a minimum number of them

121
Minimality procedure

• Find maximal k-cubes (prime implicants)
• If a 1 is covered by only one maximal k-cube this
  has to be chosen (essential prime implicants)
• Select a minimum number of the remaining k-cubes
  so to cover all 1s not covered by essential prime
  implicants

122
Exercise (3)

• Find the minimal SOP expression for
• Fm1m3m4m5m6

1
1
1
1
1
FXZXZXY
123
Exercise (3)

• Find the minimal SOP expression for
• Fm1m2m3m5m7

1
1
1
1
1
FZXY
124
A KM for 4-variable functions
125
Circular adjacenciesfor 4 variables
126
Four Variable Terms

• Four variable maps can have rectangles
  corresponding to
• A single 1 4 variables, (i.e. Minterm)
• Two 1s 3 variables,
• Four 1s 2 variables
• Eight 1s 1 variable,
• Sixteen 1s zero variables (i.e. Constant "1")

127
Four-Variable Maps

• Example Shapes of Rectangles

XZ
YW
XZ
128
Four-Variable Maps

• Example Shapes of Rectangles

Y
X
W
Z
129
Example

• Simplify F(A, B, C, D) given on the K-map.

minimal SOP ABACDACDBCD
130
One more example
minimal SOP BDBDCDAB


ESSENTIAL Prime Implicants
C


131
Five Variable or More K-Maps

• For five variable problems, we use two adjacent
  K-maps. It becomes harder to visualize adjacent
  minterms for selecting k-cubes.
• You can extend the problem to six variables by
  using four K-Maps.

132
The KM method for POS

• Which is the POS expression of function F
  represented by this KM?
• Use the same method used for build POS canonical
  form from truth tables
• Find the minimal SOP for F
• apply DeMorgan

133
Example
1
0
1
1
1
0
0
0
0
0
0
0
1
1
0
1

• F (CDBDAB) (CD) . (BD) . (AB)
• (CD) . (BD) . (A B)
• (CD) . (BD) . (A B)

134
Don't Cares in K-Maps

• Sometimes a function table or map contains
  entries for which it is known
• the input values for the minterm will never
  occur, or
• the output value for the minterm is not used
• In these cases, the output value does not need to
  be defined
• Instead, the output value is defined as a don't
  care
• By placing don't cares ( an x entry) in the
  function table or map, the cost of the logic
  circuit may be lowered.

135
Example 1

• A logic function having the binary codes for the
  binary-coded decimal (BCD) digits as its inputs.
• Only the codes for 0 through 9 are used.
• The six codes, 1010 through 1111 never occur, so
  the output values for these codes are x to
  represent dont cares.

136
Example 2

• Consider the following function f(A,B)
• f(A,B)1 if AB0
• f(A,B)0 if A ? B

Truth table on the left may be substitued by
anyone on the right
137
Example 3

• Consider the following function f(A,B)
• f(A,B)1 if AB0
• f(A,B)0 if A ? B
• f(A,B) is used just as input for another function
  g(f,A,B)(AB) f(A,B)

Notice that for A1 and B0 g(f,A,B) (10)
f(A,B) 0
138
Example
f(W,X,Y,Z) YZ XW
X
X
1
1
Simplify the choice, since each X can be
considered a 0 or a 1
X
1
1
1
139
Example
f(W,X,Y,Z) YZ ZW
X
X
1
1
a different choise is possible
X
1
1
1
140
Multiple-Level Optimization

• Multiple-level circuits - circuits that are not
  two-level
• Multiple-level circuits can have reduced gate
  input cost compared to two-level (SOP and POS)
  circuits
• Multiple-level optimization is performed by
  applying transformations to circuits represented
  by equations while evaluating cost

141
An Example

• GABC ABD E ACF ADF
• gate input cost 17
• GAB(CD) E AF(CD)
• gate input cost 13
• G(AB AF)(CD) E
• gate input cost 11
• GA(BF)(CD)E
• gate input cost 9

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