EECSCS 370

1
EECS/CS 370

• Instruction Set Architecture
• Lecture 4

2
Lectures of Instruction Set Architecture (ISA)
Design

• Lecture 3 Storage types and addressing modes
• Lecture 4 MIPS architecture
• Lecture 5 Calling functions / passing arguments
• Lecture 6 Translation software

3
Recap (storage)

• Registers
• Small array of storage locations in processor
• Fast access
• Direct addressing only
• Memory
• Large array of storage locations
• Slow access
• Many addressing modes

4
Instruction Set Design

• What instructions should be included?
• add, branch, load/store
• multiply, divide, sqrt
• mmx_add
• What storage locations?
• How many registers?
• How much memory?
• Any other architected storage?
• How should instructions be formatted?
• 0, 1, 2 or more operands?

5
MIPS instruction set

• Three main types of instructions
• Arithmetic
• Add, subtract, multiply, divide
• Logical and, or, shift, rotate, etc.
• Compare equal, lt, le, ne, etc.)
• Memory access
• Load, store
• Sequencing / control flow
• Jump, branch, function call, return

6
MIPS arithmetic instructions

• Format three register operand fields
• e.g., add 3, 4, 7
• C f (g h) (i j) // (PH, pg. 109)

7
MIPS arithmetic instructions

• Format two register operand fields and an
  immediate constant (16 bit)
• e.g., add 3, 4, 10
• C f g ? 10 f 0x10002

8
MIPS arithmetic instructions
abs rd, rs // absolute value add rd, rs,
rt // add addi rd, rs, imm // add
immediate and rd, rs, rt // logical AND
of bits div rd, rs, rt // divide mult
rd, rs, rt // multiply neg rd, rs
// negate (pseudo-instruction) nor rd,
rs, rt // logical NOR of bits sll rd,
rs, imm // shift left logical li rd,
imm // load immediate (pseudo-instruction)
9
MIPS memory instructions

• Format two register operand fields and an
  immediate constant (16 bit)
• e.g., lb 3, 1000(4) // load byte
• Retrieves 8-bit value from memory location
  (41000) and puts the result into 3 (sign
  extended)

R3
10
R4
2505
10
MIPS memory instructions

• Format two register operand fields and an
  immediate constant (16 bit)
• e.g., lb 3, 1000(4) // load byte
• Retrieves 8-bit value from memory location
  (41000) and puts the result into 3 (sign
  extended)

254
R3
R4
2505
11
MIPS memory instructions

• Other load instructions
• lbu \\ load byte unsigned (no sign extension)
• lh \\ load halfword (16 bits)
• lhu \\ load halfword unsigned
• lw \\ load word
• Store instructions
• sb , sh , sw \\ store byte, halfword and word

12
Sample test question

• What is the final state of memory once you
  execute the following instructions sequence?

lw 4, 100(0) lb 3, 102(0) sw 3,
100(0) sb 4, 102(0)
0x02
100
0x03
101
0xFF
102
0x FFFF FFFF
3
0x05
103
0x0203 FF05
4
13
Sample test question

• What is the final state of memory once you
  execute the following instructions sequence?

lw 4, 100(0) lb 3, 102(0) sw 3,
100(0) sb 4, 102(0)
0xFF
100
0xFF
101
0xFF
102
0x05
0x FFFF FFFF
3
0xFF
103
0x0203 FF05
4
14
Write assembly code for the following C expression

• C a b names i
• Assume a is in 1, b is in 2, i is in 3 and
  the array names starts at address 1000 and holds
  32 bit integers.

mult 5, 3, 4 // calculate array offset
lw 4, 1000 (5) // load namesi
add 1, 2, 4 // calculate b namesi
15
Write assembly code for the following C expression

• C class int a char
  b,c y
• y.a y.b y.c
• Assume a pointer to y is in 1.

lb 2, 4 (1) // load y.b
lb 3, 5 (1) // load y.c
add 4, 2, 3 // calculate y.by.c
sw 4, 0 (1) // store y.a
16
MIPS sequencing instructions

• Sequencing instructions change the flow of
  instructions that are executed.
• This is achieved by modifying the program
  counter.
• Conditional branches
• If (condition_test) goto target_address
• Condition_test compares two operands (registers)
• Target_address is a 16-bit displacement on
  current PC4
• beq 4, 0, 8 // branch 2 instr ahead if 4 0

beq add add mult
17
Other branches

• bne 2, 3, offset // branch to
  offsetPC4 if 2 ? 3
• bge 2, 3, offset // psuedo-instruction
  2 ? 3
• j target // jump to target (pseudo-direct
  addressing mode)
• // uses a 26-bit target address
  concatenated to top 6 // bits of PC
• jr 3 // jump to address in 3 when
  is this useful?
• jal target // put PC4 into register ra and
  jump to target

18
Final Example

• // assume all variables are integers
• // i is in 1, start of a is 500, sum is in 2
• for (i0 i lt 100 i)
• if (ai gt 0)
• sum ai

add 1, 0, 0 addi 4, 0, 400 Loop1 blt 4,
1, endLoop lw 5, 500(1) ble 5, 0,
endIf add 2, 2, 5 endIf add 1, 1,
4 j Loop1 endLoop