332:578 Deep Submicron VLSI Design Lecture 2 Process Corners and AC Models

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332578 Deep SubmicronVLSI DesignLecture 2
Process Corners and AC Models

• David Harris and Michael Bushnell
• Harvey Mudd College and Rutgers University
• Spring 2005

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Outline

• Process Corners
• Small-signal MOSFET model
• Voltage Gain
• Summary

Material from CMOS VLSI Design, by Weste and
Harris, Addison-Wesley, 2005
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Geometry Dependence

• Drawn transistors Wdrawn and Ldrawn
• Actual gate dimensions differ by XW and XL
  factors
• Manufacturer may make narrower poly or overetch
  poly to get shorter channels
• Source drain diffused laterally under gate by
  LD
• Shorter effective channel length
• Diffusion of bulk by WD decreases effective
  channel width
• Effective transistor dimensions

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Geometric Effects

• Transistor drawn 2X as long has effective length
  more than 2X as great
• Transistors differing in drawn widths by 2X may
  differ in Isat by gt 2X
• Transistor of 2X minimum length usually gives
  lt ½ current of minimum length device
• When currents must be matched in analog circuits
• Use same W and L for each device
• Orient both devices exactly the same way
• Place dummy poly nearby to improve etch uniformity

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Parameter Variation

• Transistors have uncertainty in parameters
• Process Leff, Vt, tox of nMOS and pMOS
• Vary around typical (T) values
• Fast (F)
• Leff ______
• Vt ______
• tox ______
• Slow (S) opposite
• Not all parameters are independent
• for nMOS and pMOS

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Parameter Variation

• Transistors have uncertainty in parameters
• Process Leff, Vt, tox of nMOS and pMOS
• Vary around typical (T) values
• Fast (F)
• Leff short
• Vt low
• tox thin
• Slow (S) opposite
• Not all parameters are independent
• for nMOS and pMOS

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Environmental Variation

• VDD and T also vary in time and space
• Fast
• VDD ____
• T ____

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Environmental Variation

• VDD and T also vary in time and space
• Fast
• VDD high
• T low

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Process Corners

• Process corners describe worst case variations
• If a design works in all corners, it will
  probably work for any variation.
• Describe corner with three letters (T, F, S)
• nMOS speed
• pMOS speed
• Voltage
• Temperature

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Important Corners

• Some critical simulation corners include

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Important Corners

• Some critical simulation corners include

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Small Signal AC MOSFET Model

• Linear transistor region operation only
• gds b (Vgs Vt) 2 Vds
• lim gds b (Vgs - Vt)
• Vds 0
• Rchannel (linear) 1
• b (Vgs Vt)
• Model as a resistor

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Small-Signal Model
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Saturation Small Signal Model

• In saturation, behaves like a current source
• d Ids d (Vgs Vt)2 0
• d Vds d Vds
• But channel length modulation gives this a slope
• gm d Ids
• d Vds
• gm (linear) b Vds
• gm (sat) b (Vgs Vt)

b 2
Vds constant
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Voltage Gain Computation

• CMOS inverter really an analog amplifier
  operating under saturation
• In region C, Vout - A Vin

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Gain Estimation

• Estimate gain using amplifier small-signal gain
  linear region
• A gm total Rds effective
• (gmn gmp) ( rdsn rdsp) gm rds
• 2 gm rds2
• 2 rds
• Gain depends on process transistors ranges
  from 100 to 1000
• Improve by lengthening transistors, but that
  ruins speed bandwidth

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Summary

• Process Corners
• AC Small Signal Model
• Voltage Gain