Title: The 555 Timer and Applications
1The 555 Timer and Applications
2Block diagram representation of the internal
circuit of the 555 integrated-circuit timer.
3555 Timer Features
- Single DC supply (that can run from 4.5V to 18V).
- Can provide relatively large currents to a load
(hundreds of mA). - Can reach frequencies of up to hundreds of KHz,
or as low as fraction of 1Hz.
4555 Timer Pins Arrangement
8
6
3
2
4 Reset 5 Control
7
1
5Two Basic Applications
- One-Shot The timer creates a single specific
constant width pulse in response to a triggering
pulse. - Oscillator Timer generates a square-wave signal
with a specific frequency and specific
duty-cycle.
6Pins 4 and 5
- In the two basic applications pins 4 (Reset) and
5 (Control) are unused. - Unused Pin 4 must be connected to the Dc supply
VCC. - Unused Pin 5 must be connected to ground via a
capacitor C10nF. - Both pins play important roles in more advanced
applications.
7555 Inner Structure - Comparators
Comparator 1 has (-) threshold of 2VCC
/3. Comparator 2 has () threshold of VCC/3,
unless modified via pin 5. Comparators outputs
is either HIGH (slightly below VCC) or LOW0.
8555 Inner Structure Flip-Flop
Flip-flop has two complementary outputs If Q is
HIGH then Qbar is LOW and vice versa. Two inputs
SET (activated if comp. 2 output is HIGH) and
RESET (activated if comp. 1 output is HIGH or if
pin 4 is LOW).
Output Q is tied to pin 3
9555 Inner Structure Transistor
Transistor Q1 is driven by the Qbar output of
flip-flop. If QbarHIGH then Q1 is ON and has a
low collector-emitter resistance. If QbarLOW
then Q1 is in cutoff.
Q1 collector is tied to pin 7 (Discharge)
10555 Operation - 1
Normally Trigger (pin 2) is held at a voltage
that is larger than VCC/3. If Trigger (pin 2)
becomes lower than VCC/3 then comparator 2 turns
HIGH and flip-flops output is SET to HIGH.
Q1 cuts off.
11555 Operation - 2
If Threshold (pin 6) becomes higher than 2VCC/3
then comparator 1 turns HIGH and flip-flops
output is RESET to LOW. Transistor Q1 turns ON.
12555 Timer configured as One Shot
- Pin 6 (Threshold) and Pin 7 (Discharge) need to
be connected to each other. - External R,C are used to create the one-shots
pulse width. R connects to VCC and to C. C
connects between R and ground. - Pins 6,7 are connected to the node between R and
C. - Pin 2 receives an input from the triggering
circuitry (to be explained soon). - Pins 4,5 are unused (see earlier slide).
13555 One Shot Direct Triggering
- We may connect pin 2 directly to a VPULSE
oscillator (which may be implemented by a 555
oscillator circuit). - The triggering square wave must satisfy three
conditions HIGH must be above VCC/3, LOW must be
below VCC/3 and LOW-time must be small enough (a
narrow low pulse), narrower than the pulse that
is generated by the one shot.
14555 One Shot CR Triggering
- The triggering square wave signal could have any
levels and widths. - The square wave goes into a CR network that does
some sort of a signal differentiation. - Negative spike is used to trigger pin 2 of the
555. Its peak must be lower than VCC/3. Positive
spike is unused.
15555 Timer One Shot Configuration and signals
16555 One Shot Explanation of Operation
- Pin 2 is triggered ? Comparator 2 sends SET to
flip-flop ? Output pulse starts ? transistor cuts
off ? Timing RC network starts to charge C from
VCC via R. - As C voltage reaches 2VCC/3 comparator 1 sends
RESET to flip-flop and output pulse ends ?
transistor turns ON and does a fast discharge of C
17Key Design Formula
- C starts at 0 and charges exponentially, with
time constant RC, to a value of 2VCC/3. - After pulse ends, need to allow for some small
recovery time, allowing Cs voltage to go back
to zero.
18555 One Shot Simulation
19GreenV(trig), PurpleV(cap), BlueV(out),
RedV(trig_in)
20555 Timer Oscillator Configuration
21555 Oscillator Explanation of Operation
- Initially C is discharged and flip-flops output
is QHIGH and transistor is OFF. - C begins to charge towards VCC via resistors RA
and RB. - When C voltage reaches 2VCC/3 flip-flop resets,
transistor turns ON. C begins to discharge
towards 0 via RB and the transistors ON
resistance. - When C voltage reaches VCC/3 flip-flop sets
again. - C forever charges and discharges between the
above threshold levels.
22Key Oscillator Design Formulas
- TH is the time that output is HIGH.
- TL is the time that output is LOW.
- T is the oscillation period.
- Duty-cycle is always larger than 50.
23555 Oscillator Simulation
Enforce IC0 for C1.
24Simulated V(cap) and V(out)
25Extra Credit Assignments
- Each Exploration Activity, if done right, is
worth 0.25. There are 7 exploration activities.
Partial credit will be awarded to imperfect
explorations, depending on the quality of the
work done. - Each Advanced Activity is worth 1, again with
possibility of partial credits. Do no more than 2
advanced activities.
26One-Shot Exploration Activities - 1
- What is the one-shots recovery time? Zoom in on
capacitors discharge back to zero. - Increase designed pulse width such that it is
larger than the period of the triggering signal
What happens when a second triggering signal
comes in while the pulse is not over yet? Is the
second triggering ignored?
27One-Shot Exploration Activities - 2
- Explore the triggering CR circuit (by trying
different incoming signals voltage levels and
different RC values). When does the triggering
work right and when does it fail? Keep in mind
that very often the square wave that goes into
the CR circuit comes from another 555 timer,
configured as an oscillator
28Oscillator Exploration Activities - 1
- Let pin 4 (Reset) be connected to VPULSE that has
V1VCC and V20. Select some value t1 for TD, and
let PW be larger than the simulations final
time. Watch how at tt1 the reset kicks in and
stops the oscillation. - Let pin 5 (Control) be connected to VSIN with
some large amplitude and relatively small
frequency. Watch how the frequency of the
oscillator can be modulated. Can you create a
siren wave?
29Oscillator Exploration Activities - 2
- What is the highest frequency that we can
generate? Why is that so? Hint Can you measure
the ON resistance of the transistor? - Can you generate a square-wave signal with
duty-cycle which is close to 50? Should you
simply take RAltltRB?
30Advanced Activities - 1
- Car Burglar Alarm Circuit When car door opens a
contact switch is activated causing the driver to
be given with a 30 seconds delay before an alarm
siren is sounded. When driver acts properly (say,
keys in some code within this half a minute), the
alarm circuit is reset. Complete the design.
31Advanced Activities - 2
- Analog Frequency Meter A 50 duty-cycle
square-wave signal (VPULSE) has a frequency that
needs to be measured. That is, circuits output
is (at steady-state) a DC signal proportional to
f. Explore the meters limitations. - Hints 1) The time average of a one-shots output
is proportional to f (Why?), 2) Averaging can be
done with a low-pass filter. You may use LOPASS
from the ABM library.
32Advanced Activities - 3
- Analog Capacitance Meter An unknown C needs to
be measured. That is, circuits output is (at
steady-state) a DC signal proportional to C.
Explore the meters limitations. - Hint Embed the unknown C in some 555 basic
circuit that needs a capacitor. Is it better to
use a one-shot or an oscillator? DC output should
be linearly proportional to C.
33Advanced Activities - 4
- Missing Pulse Detector Create some specific
periodic VPULSE signal. Create a single pulse
(like the ones in the above sequence of pulses).
You may subtract the two signals to create a
sequence of pulses in which one pulse is missing.
Can you design a 555 timer circuit that detects
(i.e. creates some special pulse) a sequence in
which one of the pulses is missing?