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SOS S

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S?ed?as? ??a t?? e?t??es? n threads (SMT resource allocation, threads scheduling) ... ?e?a???a ?? ?? (cache sharing, coherence protocols, NUMA architectures) ... – PowerPoint PPT presentation

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Title: SOS S


1
???S????OS? ?????????????S
2
??sa????
  • ??e??a st?? ????te?t????? ?p?????st??
  • S?ed?as? epe?e??ast? ??a t?? e?t??es? 1 thread
    (pipeline, branch prediction)
  • S?ed?as? ??a t?? e?t??es? n threads (SMT resource
    allocation, threads scheduling)
  • ?te???e?e?? a???te?t?????? (Cell)
  • ?a??????a s?st?µata
  • ?e?a???a µ??µ?? (cache sharing, coherence
    protocols, NUMA architectures)
  • ???t?a d?as??des?? (on-chip interconnection
    networks)
  • Virtualization
  • ?a?????? pa???????? ??d??a (synchronization
    costs, locks, Transactional Memory, automatic
    parallelization)

3
??sa????
  • ???s? ?pa????t?? µ??a??µ?t??
  • ?e???? ??st?? (p?. Sun SPARC Enterprise T5120
    server (64 threads, 128GB mem) 12.800 )
  • ?d??aµ?a pa??µßas?? st? ????? t??? (s???e???µ???
    pipeline, caches, interconnection network)
  • ?e?????sµ??? d??at?t?ta pa?a???????s?? ?a?
    µet??se?? (p.?. performance counters ?????,
    µ???? documentation)
  • ?e?????sµ?? st? s?µe?a. ??? µe?et?? µe????t????
    a???te?t?????? (p.?. chip µe 100 ? 1000 threads)
  • ??s? Simulation (p??s?µ???s?)

4
???s?µ???s? ????te?t?????? (1)
  • ??e??e?t?µata
  • ??af??et??? ep?peda ?ept?µ??e?a? ?a? a???ße?a?
  • Pipelines, caches, branch predictors,
  • Hardware devices (timer, drives, cards, )
  • ?????? d?af??e?a ?a? e?????a pa?a???????s?? ?a?
    µet??se??
  • ??e???? ?a???t?µ?? p??t?se??/?de??
  • ??st??
  • Open source (Free)
  • Academic licenses (Free ? µ???? ??st?? ??a
    support)

5
???s?µ???s? ????te?t?????? (2)
  • ??????se??
  • ?????? a??pt???? t?? µ??t???? (modeling time)
  • ??e???? ????t?ta? µ??t???? (validation)
  • ?a??t?ta
  • Active research field
  • ??????a ep??????
  • Virtutech Simics (x86, SPARC, MIPS, Leon, )
  • AMD SimNow (x86)
  • Simplescalar (Alpha)
  • SMTSIM (Alpha SMT)

6
??atf??µe? ???s?µ???s??
  • ???f???? t?p?? p??s?µ???t??
  • Trace-driven vs. Execution-driven
  • Cycle-level accurate vs. Functional models
  • Full system simulators (p.?. Simics)
  • ???f???? t?p?? p??s?µ???s??
  • ?????? e?t??es? efa?µ????
  • ???s? stat?st???? µe??d??

7
Functional vs. Timing Simulation
  • Functional Simulation
  • ???s?µ???s? t?? ?e?t???????t?ta? t?? e?t????
    (instructions semantics and functionality)
  • ?etaß??? t?? state (registers, memory, )
  • S?st? program output
  • Timing Simulation
  • Functional simulation
  • ?ept?µe??? ???p???s? t?? d?af??et???? d?µ?? p??
    ???s?µ?p?????ta?
  • ?????sµ?? ?e????t??, p???e?µ???? ?a ?p?????s?e? ?
    ?????? e?t??es?? t?? p?????µµat??
  • Functional simulation p??? p?? ???????

8
Full System Simulator
  • ?????? d?aded?µ???? p??s?µ???t?? (p.?.
    Simplescalar) p??s?µ??????? µ??? t?? ??d??a t??
    efa?µ???? p?? ep????e? ? ???st??
  • ???e??? OS
  • Hack ??a t?? p??s?µ???s? system calls
  • Full system simulators
  • ?ea??st????
  • ???s?µ???s? OS (p.?. Simics boots Linux)
  • ????ße?a (accuracy)
  • ?a??t?ta

9
?a??de??µa ?????? p??s?µ???s??
  • spec2k with gcc and small inputs

10
?p????? pe??ß?????t?? p??s?µ???s??
  • ???t???a ?p??????
  • Modularity simulator
  • Extensibility simulator
  • ?p?ped? a???ße?a? simulator
  • ?a??t?ta simulator
  • ???e??? t?? design space p?? ?????µe ?a
    µe?et?s??µe
  • ?p????? ?at??????? benchmarks

11
Stat?st??? ???s?µ???s??
  • ? s??p?? e??? timing simulation e??a? ?
    s?????t??s? p????f????? ?a? µ?t??s? d?af????
    µe?e???
  • IPC
  • Memory access cycles
  • On-chip network contention
  • ?a p?????µµata pa???s?????? d?af??et???? f?se??
  • Initialization phase
  • Main phase
  • Wrap-up phase
  • ??te pa?????µe ta stat?st??? p?? µa? e?d?af?????

12
Stat?st??? ???s?µ???s??
13
Simics
  • Full system simulator
  • ?p?st????? d?af??et???? s?st?µ?t?? (x86, Sun,
    ARM, )
  • ??t??es? OS ?a? workloads ????? p??s???e?/a??a???
  • ?????st? interface ??a microarchitecture modeling
  • O Simics pa???e? t? functional simulation ?a? ?
    ???st?? ap?fas??e? ??a t? timing t?? d?af????
    ?e????t??
  • ???p???se?? cache memories
  • ??????st??s? ??a s?????t??s? p????f????? ?at? t?
    run time
  • ?????? ap?de?t?? st? architecture research
    community
  • Ta t?? ???s?µ?p???s??µe st?? as??se??
  • Academic license for NTUA

14
Simics Terminology
  • Host machine
  • ?? µ?????µa/OS st? ?p??? t???e? ? Simics
  • Target machine
  • ?? µ?????µa/OS t? ?p??? p??s?µ????e? ? Simics
  • ?e? apa?te?ta? ? a???te?t????? ?a? t? OS t?? 2
    µ??a??µ?t?? ?a e??a? ta ?d?a
  • Compile se d?af??et??? µ??a??µata!
  • Steps vs. cycles vs. instructions

15
Simics Environment
  • Command line interface, pa??µ??? µe t? gdb
  • Scripting
  • ???at?t?ta scripting ?a? se Python
  • ???pt??? µ??t???? (C, Python)
  • Checkpointing
  • ??af??et???? t??p?? p??s?µ???s??
  • Fast, stalls, MAI
  • Speed vs. accuracy

16
Simics Major Components
  • Functional
  • Modules
  • C, Python, DML
  • Devices, components, boards, machines
  • ??e???p?????ta? µe Simics ? Python scripts
  • Timing
  • Memory, caches, Simics MAI
  • ? ???st?? ????e? t?? ?a??ste??se?? t?? ???e
    module

17
Simics Demo
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