US ATLAS Tracking Upgrade

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Staves An Integrated Tracking Structure for the
ID

• Carl Haber

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Outline

• Issues from Genoa
• Derived specifications
• Progress on Phase 1 program
• Plan for future work

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Genoa Meeting

• Basic configuration consensus
• Pixel region
• Intermediate region 3 SS layers 3cm x 80mm
• Outer region 2 DS layers 10cm x 150mm,
• Z measurement provided by stereo
• Radiation issues implication for S/N and
  operating temperature
• -25C suggested
• Strong emphasis on material and services
  reduction alternate powering schemes

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Basic Genoa Layout
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2 Types of Staves
16 modules/side
18 modules/side

• 20ltRlt50cm 1 meter stave, 6.4 x 3 cm strips,
  alternate along Z, top/bottom provides full
  coverage
• Rgt50cm 2 meter stave, 6.4 (12.8) x 12 cm strips,
  axial/stereo top/bottom design to provide Z at
  large radius
• Width driven by economics and electrical issues
  (voltage drops)

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Mechanical Core
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Stave End View
Silicon Sensors 4mm separation
Peek Cooling channels 2.9 x 5.6 mm
Hybrid electronics
Carbon Fiber Skin
Foam Core
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Integrated support structure 2 int bulkhead 3
outer bulkheads 2(3) barrels
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Structure with one outer barrel and maximum of 1
meter unsupported staves
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Details of CDF Bulkhead
See stave core mechanical samples
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Stave Specifications

• Electrical
• Power distribution
• Signal transmission
• HV
• Mechanical advocate a monitored approach with
  software corrections implicit. There are many
  examples of large scale precision systems done
  that way.
• Accuracy in plane
• Sag effects
• Operating temperature and gradients

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Property Short stave Long Stave
width 6.4 cm 6.4 cm (12.8 cm)
length 98 cm 192 cm
detector width 6.4 cm 6.4 cm (12.8 cm)
detector length 3 cm 12 cm
detectors per side 18 16
gap between detector along the stave 2.4 cm 3 mm
detector thickness 280 microns 300 microns
number of strips 768 384 (768)
strip pitch 80 microns 160 microns
Power in front end chips 3 watts 1.7 watts (3.3 watts)
Power in silicon no dose 1 milliwatt 1 (2) milliwatt
Power in silicon high dose 1 watt 1 (2) watt
Maximum temperature at silicon -25 C -10 C
Maximum temperature variation lt5 C lt5C
Max detector position shift from nominal Dy 30 microns 30 microns
Max detector position shift from nominal Dx 30 microns 30 microns
Survey accuracy Sy 5 microns 5 microns
Survey accuracy Sx 10 microns 5 microns
Survey accuracy Sq 0.13 mRad 0,13 mRad
Ladder sag maximum 250 microns 500 microns
Ladder sag stability 50 microns 50 microns
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Operating Temp S/N

• At Genoa values quoted -15 to -25 C
• Depends on how the specd S/N (10?) is achieved,
  many variables at play
• Leakage current vs dose well known
• Silicon thickness
• CCE, orientation (n in p, n in n, p in n)
• Strip pitch cluster size, capacitance
• FE noise, integration time

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Continued

• p bulk gives us high field at collection, good
  for CCE issue
• Wide pitch (150 um) gives us large volume for
  current generation (bad) but favors single strip
  clusters (good), and lower capacitance
• Fast electronics allows us to reduce integration
  time (good for shot noise) but has larger series
  noise (bad, but how bad?) and required more power
  (bad for cooling).
• Etc.

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Comments on Monitoring

• Stave sag and other deformations (temperature)
  will be present
• Position monitoring and readout should be
  designed into the system from the start.
• A number of precise and long range position
  sensing technologies are commercially available
• We should be prepared to apply software
  corrections to the alignment extensively

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Phase 1 Stave

• An ATLAS version of the CDF Run2b device
• 1 sensor hybrid 1 module (hybrid glued to Si)
• 6 modules per side
• Modules linked by embedded bus cable and
• readout token passing scheme
• 2 sided axial/stereo or axial/axial
• 1 Interface Card /stave
• Total length 66 cm
• 6144 channels /stave
• Built around carbon fiber/foam laminate

Purpose is do demonstrate low noise multi-module
performance with ATLAS electronics
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Phase 1 Milestones (completion dates given) full
electrical specification and schematic for Phase
1 stave 10/04 done establishment of test stands
at LBNL, BNL, and Hampton 11/04 done validation
of test stand operation on test
parts 12/04 done design and layout of Phase 1
hybrid 12/04 done fabrication of
hybrid 03/05 done assembly and test of
hybrid 04/05 done re-commission and tests with
existing fixtures 03/05 done assembly of ATLAS
staves 06/05 11/05 initial test of ATLAS
staves at LBNL 07/05 11/05 transfer to and
test of staves at BNL/Hampton 08/05 12/05 irradia
tion studies of staves 10/05 02/06 transfer of
assembly methods to BNL 07/05 12/05
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Bus cable detail shows bonding region
The bus cable runs UNDERNEATH the sensors.
Connections to the hybrids made with wirebonds
in small Z gaps between consecutive crystals Bus
cable is copper/kapton/Al laminate with 100
micron lines/spaces and thin Al shield
layer Electrical isolation of bus from detectors
by grounded shield and diagonal traces (not
parallel to strips)
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ABCD Hybrid

• Fabricated in BeO
• Fine pitch (100 micron) etched line-work
• 7 micron Au thickness
• Bond to pc card for test
• Re-bond on stave
• No connectors
• Schematic similar to standard SCT hybrids
• Electrically OK
• 64 fabricated

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Module Assembly/Hybrid Mount
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Module Test
Conducting rubber
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Main Technical Issue Clock Distr.

• Existing bus cable design individual clock/com
  to each of 6 modules
• This was at the edge of practicality (layout)
• Genoa long staves with N modules
• Prefer to use a multidrop configuration
• This may be the only practical solution for
  longer staves
• Stave bus cable has been redesigned, layout
  revision in progress
• Timing and reflections have been studied
• Implications for ABCD-Next design, etc.

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Bus Cable Geometry and Impedance
Materials Al foil 2mil, Dupont LF0100, Shinetsu
CA333 2 mils, Cu 18 um, Kapton 1 mil, Adhesive
2
Al
1
ADHESIVE
1
1
0.7
Cu
1
KAPTON
1
CF
gtgtMatches measured impedance
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Issue of timing

• Hybrid stubs 12 pf
• LVDS risetime 3.5 ns
• Bandwidth 0.35/3.5 100 MHz
• Impedance of hybrid stub due to capacitance
• 1/(2pi 100 MHz 12 pf) 130 ohms
• Propagation time 60 ps/cm (3 ns for 50 cm)

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Measurements

• Literature available on LVDS multidrop
  performance
• Application reports from TI, National, Fairchild
• TI study of 36 receivers
• Need to understand this configuration as part of
  the ongoing study
• Significant impact on cabling

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Bus Cable Test
75 W termination
1212 W
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Implications

• Bus cable test results imply that Phase 1 test
  stave with 6 hybrids (4 ABCD chips/hybrid) will
  probably work with a single clock line.
• For large N staves need to consider an LVDS
  receiver chip at the hybrid input to reduce
  capacitance seen by the bus drivers
• This is consistent with reduced services model
• AC coupling
• Regulators
• Current monitor
• Addressing issues (A.G. note)
• The module receiver chip (MRC) definition and
  specification should become an important aspect
  of the ABCD-next discussion.

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Continued Activity FY06

• Complete Phase 1 stave
• Apply a multidrop configuration
• Alternative powering add to a second version of
  the Phase 1 stave
• Serial
• DC-DC?
• Study of bussing and system issues.
• Development of stave readout electronics
• Evaluate performance of SCTDAQ for multi-module
  tests
• Development of detectors
• BNL is pursing the 3 cm design
• Study of mechanical concepts for long staves
  Bill Miller
• Material
• Geometry, cross-section
• Cooling
• Fabrication
• ABCD-next
• MRC definition?

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Complete Phase 1 Stave

• Fabricate bus cable
• Continue fabrication and test of remaining
  hybrids and modules
• Assemble and test 2-3 staves for LBNL and BNL,
  Hampton
• Costs within FY05 funding

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Alternate Powering

• Development of specs (LBNL)
• Add serial powering test to the Phase 1 stave
• New version of the bus cable (LBNL)
• Add power interface hybrid (LBNL, RAL)
• Use commercial components
• Investigate a universal configuration for
  serial and DC-DC tests (LBNL)
• System issues bypass, failure, noise (BNL)

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Readout System

• Need to understand how well current UK test stand
  works for multi-module staves tests, issue of
  concurrent operation
• Alternative is a simple pattern generation
  approach similar to LBNL Patt Board developed
  by MGS for CDF
• Engineering on this would be done at BNL and is
  included in FY06 budget

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Detectors

• To go beyond the Phase 1 stave based upon CDF
  Run2b surplus detectors required ATLAS specific
  devices
• Candidate is the 3cm short strip design
• BNL will do a design and fabricate.
• For the outer stave the CDF devices may still be
  useful need to do inventory and availability

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Mechanics

• 1m and 2m designs require new ME effort for
  design and fabrication
• Laminates
• Boxes
• Extrusions
• Low temperature operation
• Materials
• B.Miller effort LBNL
• Fixture studies LBNL (FNAL connection)
• BNL engineering
• RAL engineering

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Conclusions/Actions

• Complete phase 1 stave
• Near term
• Develop serial powering modification to stave
• Summer 06
• ABCD-next effort
• Define interface aspect, MRC
• Continue mechanical studies
• Include monitored alignment concepts
• Develop test detectors for phase 2 stave
• Readout electronics study

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