Title: Building D Flip Flops
1Building D Flip Flops
- Combinational Circuit Components
- Switches
- Voltage inverters
- D Clocked Latch
- Feedback to store bits
- D Flip Flop
- Two D clocked latches
2Building D Flip Flops
D Flip Flops
D Clocked Latches
Primitive Combinational Circuits(Switches/Transis
ters)
3Combinational Circuit Components
Control L
Control H
Normally Open Switch
open
closed
L
H
Normally Closed Switch
open
closed
L
H
4Combinational Circuit Components
Voltage Inverters (2 symbols)
Active Device
L
H
L
H
5A Simple 1-Bit Memory
Q
D
State value (1 bit)
Input to load new state value
6A Simple 1-Bit Memory
Q
D
State value (1 bit)
Input to load new state value
Two configurations Hold (store) hold onto the
state value Load load a new state value
7Holding (Storing)With Voltage Inverters
Devices drive each other
8Holding (Storing)With Voltage Inverters
Devices drive each other
H
9Holding (Storing)With Voltage Inverters
Devices drive each other
H
H
L
10Holding (Storing)With Voltage Inverters
Devices drive each other
H
H
L
L
11Holding (Storing)With Voltage Inverters
Devices drive each other
H
H
L
L
12Simple Memory Two Configurations
Q
D
State value (1 bit)
Input to load new state value
Two configurations Hold (store) hold onto the
state value Load load a new state value
13Simple Memory Two Configurations
Hold
Load
D
Q
D
Q
14Simple Memory Two Configurations
Hold
Load
D
Q
D
Q
Switches
Switches
15D Clocked Latch
clock
Q
D
clock
clock L Hold clock H Load
16D Clocked Latch
Hold
Q
D
Q
Clock
L
Clock
Q D
Load
It similar to a D flip flop but it reacts to the
clock differently
D
Q
Clock H
Its transparent
17Comparing Flip Flop and Latch
Q
D
Clock
Clock
D
Q-FlipFlop
Q-Latch
18Comparing Flip Flop and Latch
Q
D
Clock
Clock
D
T1
T2
Q-FlipFlop
T3
Q-Latch
19Comparing Flip Flop and Latch
Q
D
Clock
Clock
D
Q-FlipFlop
Q-Latch
20Comparing Flip Flop and Latch
Q
D
Clock
Clock
D
Q-FlipFlop
Q-Latch
21D Flip Flop vs. D Clocked Latch
- D flip flop
- Triggered on positive edge of clock
- Output Q (and state) changes only at a time
instant - D clocked latch
- Output Q changes (with D) while clock is H
- Output Q changes during a window of time
- Trickier to use since lots of changes can happen
during a time duration - Flip flops are preferred to latches in designing
circuits - Latches are used in memory circuits, e.g., RAM
22D Flip Flop
D
Q
D
Q
Clock
Clock
23D Flip Flop
D
Q
D
Q
Clock
Clock
Load D Q
Clock L
Hold
24D Flip Flop
D
Q
D
Q
Clock
Clock
Load D Q
Clock L
Hold
Load D Q
Clock H
Hold
25D Flip Flop
Load (loads input)
Hold (output doesnt change)
L
D
Q
D
Q
Clock
Clock
Input really doesnt get stored until the
upward clock transition
Clock
26D Flip Flop
Load (loads input)
Hold (output doesnt change)
L
H
H
D
Q
D
Q
Clock
Clock
Input really doesnt get stored until the
upward clock transition
Clock
27D Flip Flop
Load (loads input)
Load (transfers state to output)
Hold (output doesnt change)
Hold
H
H
L
H
H
D
Q
D
Q
Q
D
D
Q
Clock
Clock
Clock
Clock
Input really doesnt get stored until the
upward clock transition
Clock
28Summary
- Combinational circuit components
- switches and voltage inverters
- D clocked latch
- Built from switches and voltage inverters
- 2 configurations load and hold
- D flip flop
- Built from two D latches in series