Title: Chapter 5 Field-Effect Transistors
1Chapter 5Field-Effect Transistors
2Chapter Goals
- Describe operation of MOSFETs and JFETs.
- Define MOSFET characteristics in operation
regions of cutoff, triode and saturation. - Discuss mathematical models for i-v
characteristics of MOSFETs and JFETs. - Introduce graphical representations for output
and transfer characteristic descriptions of
electronic devices. - Define and contrast characteristics of
enhancement-mode and depletion-mode MOFETs. - Define symbols to represent MOSFETs in circuit
schematics. - Investigate circuits that bias transistors into
different operating regions. - MOSFET and JFET DC circuit analysis
- Explore MOSFET modeling in SPICE
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4Types of Field-Effect Transistors
- MOSFET (Metal-Oxide Semiconductor Field-Effect
Transistor) - Primary component in high-density VLSI chips such
as memories and microprocessors - JFET (Junction Field-Effect Transistor)
- Finds application especially in analog and RF
circuit design
5The MOS Transistor
Polysilicon
Aluminum
6The NMOS Transistor Cross Section
7MOS Capacitor Structure
- First electrode - Gate Consists of
low-resistivity material such as highly-doped
polycrystalline silicon, aluminum or tungsten - Second electrode - Substrate or Body n- or
p-type semiconductor - Dielectric - Silicon dioxide stable high-quality
electrical insulator between gate and substrate.
8Substrate Conditions for Different Biases
Accumulation VG ltlt VTN
Depletion VG lt VTN
Inversion VG gt VTN
9Low-frequency C-V Characteristics for MOS
Capacitor on P-type Substrate
- MOS capacitance is non-linear function of
voltage. - Total capacitance in any region dictated by the
separation between capacitor plates. - Total capacitance modeled as series combination
of fixed oxide capacitance and voltage-dependent
depletion layer capacitance.
10 NMOS Transistor Structure
- 4 device terminals Gate(G), Drain(D), Source(S)
and Body(B). - Source and drain regions form pn junctions with
substrate. - vSB, vDS and vGS always positive during normal
operation. - vSB must always reverse bias the pn junctions
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14The Threshold Voltage
- VT VT0 ?(?-2?F VSB - ?-2?F)
- where
- VT0 is the threshold voltage at VSB 0 and is
mostly a function of the manufacturing process - Difference in work-function between gate and
substrate material, oxide thickness, Fermi
voltage, charge of impurities trapped at the
surface, dosage of implanted ions, etc. - VSB is the source-bulk voltage
- ?F -?Tln(NA/ni) is the Fermi potential (?T
kT/q 26mV at 300K is the thermal voltage NA is
the acceptor ion concentration ni ? 1.5x1010
cm-3 at 300K is the intrinsic carrier
concentration in pure silicon) - ? ?(2q?siNA)/Cox is the body-effect coefficient
(impact of changes in VSB) (?si1.053x10-10F/m is
the permittivity of silicon Cox ?ox/tox is the
gate oxide capacitance with ?ox3.5x10-11F/m)
15The Body Effect
- VSB is the substrate bias voltage (normally
positive for n-channel devices with the body tied
to ground) - A negative bias causes VT to increase from
0.45V to 0.85V
VT (V)
VBS (V)
16NMOS Transistor Triode Region Characteristics
17Concept of Asymmetric Channel
- It is to be noted that the VDS measured relative
to the source increases from 0 to VDS as we
travel along the channel from source to drain.
This is because the voltage between the gate and
points along the channel decreases from VGS at
the source end to VGS-VDS. - When VDS is increased to the value that reduces
the voltage between the gate and channel at the
drain end to Vt that is , - VGS-VDSVt or VDS
VGS-Vt or VDS(sat) VGS-Vt
18Transistor in Saturation Mode
Assuming VGS gt VT
VDS gt VGS - VT
VGS
VDS
G
S
D
B
The current remains constant (saturates).
19NMOS Transistor Saturation Region
is called the saturation or pinch-off voltage
20Channel-Length Modulation
- As vDS increases above vDSAT, the length of the
depleted channel beyond pinch-off point, DL,
increases and actual L decreases. - iD increases slightly with vDS instead of being
constant.
l channel length modulation parameter
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23(?pCox)