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TDR/TDT and S Parameters Measurement Applications and Examples 86100C Option 202 – PowerPoint PPT presentation

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1
TDR/TDT and S ParametersMeasurement
Applications and Examples 86100C Option 202
2
Outline
  • Importance of TDR and S-parameter measurements
  • One port TDR
  • Two port TDR
  • Case study PC board
  • Case study - backplane

Go
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In screen show mode, jump to desired section by
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3
Impedance Problems are Everywhere!
Components
Custom Connector
DIMM PCB
IC package
Connector
Cable
Subassemblies
Systems
Router
Storage Area Network
4
Required Parameters by Standard
Standard Max Freq, GHz Impedance Return Loss Attenu-ation Crosstalk
PCI Express Gen 2 5 X X X
PCI Express 1.25 X X X X
PCI-X X X
Serial Attached SCSI 7.5 X
IPC N/A X
Fully Buffered DIMM 2.4 X
IEEE 802.3ae X X
Infiniband 6.3 X X X
Serial ATA 4.5 X X X
EIA-364-90 N/A X X
EIA-108 N/A X X
HDMI 4.1 X X X
DVI 4.1 X
Firewire 8 X X X
USB 2.0 1.3 X X
RapidIO 8
5
Agilents Signal Integrity Portfolio
Opt201 202
Opt 200 201
86100C
86100C
6
New 86100C Capabilities
Feature Feature Benefit
TDR Calibration and N1024 Calibration Kit Higher yields through more accurate measurements Quickly see impact of rise times Higher yields through more accurate measurements Quickly see impact of rise times
S-parameters with new wizard Time and frequency domain with one button click Time and frequency domain with one button click
Export to Touchstone files Use S-parameters to model devices and systems Use S-parameters to model devices and systems
Corrected Impedance Profile (peeling) Compensate measurements for large discontinuities Compensate measurements for large discontinuities
Minimum/maximum/average Quickly compare values against standards limits Quickly compare values against standards limits
Excess reactance Obtain value for equivalent circuit components Obtain value for equivalent circuit components
Indicates feature is provided in Option 202
7
Applications for the One Port TDR (Slides 8-32)
  • Measuring characteristic impedance and uniformity
    of a transmission line
  • Measuring time delay of a transmission line
  • Accurate measurement of signal speed in a
    transmission line
  • Extracting bulk dielectric constant of the
    laminate
  • Building a model of a discontinuity
  • Building a high bandwidth model of a component
  • Directly emulating the impact on a signal with
    the system rise time from a discontinuity

8
Simple Intuitive User Interface
9
Measured TDR response - microstrip transmission
line
Top trace is the reflection from the end of the
cableBottom trace is the reflected signal from
the DUT
TDR from reference open
TDR from DUT
10
Using markers to measure the characteristic
impedance of a transmission line
11
Using advanced settings function to adjust the
vertical scale to display the impedance directly
12
The same transmission line displayed on the
impedance scale at 10 Ohms per division, with 50
Ohms in the center
13
High resolution TDR profile of a nominally
uniform transmission line
14
High resolution TDR response from each end of the
same uniform transmission line, verifying the
impedance variation is real
TDR from right end launch
TDR from left end launch
15
TDR response with markers showing the beginning
and end of the traces
TDR from reference open
TDR from 6 inch uniform line
16
TDR response of a uniform transmission line with
two small reference pads, located on 4 inch
centers
17
TDR response from a microstrip with 2 reference
pads, using markers to measure the round trip
time delay
18
Stripline construction and extracting the bulk
dielectric constant
19
Effective Dielectric Constant in microstrip
20
Using a field Solver to Back Out the Bulk
Dielectric Constant from the effective dielectric
constant
Dkbulk 4.48
Dkeff 3.34
21
TDR response from a uniform transmission line
having a small test pad
22
Using the excess reactance feature to extract the
capacitance of a test pad
23
Using markers to extract the excess capacitance
of the SMA launch
24
Using markers to extract the excess capacitance
of two corners
25
Using markers to extract the excess inductance of
a short gap in the return path
26
Using markers to extract the excess inductance of
a large gap in the return path
27
Using markers to extract the excess inductance of
an axial lead termination resistor
28
Using markers to extract the excess inductance of
a SMT termination resistor
29
Relationship of TDR and S Parameters
DUT
Incident wave
Transmitted wave
TDT
t
Reflected wave
TDR
DUT
Incident wave
Transmitted wave
S21
Reflected wave
S11
30
Converted S11 of the SMT termination resistor
31
ADS model of resistor and the measured and
simulated S parameters
Z0 48.8 Ohms TD 0.06 nsec R 48.5 Ohms L
0.489 nH
32
Emulating system rise time responses for a 200
mil long neck down region with effective rise
times 40, 100, 200, 500 psec
RT 40 psec RT 100 psec RT 200 psec RT
500 psec
33
Applications for the 2-port TDR (Slides 34-70)
  • TDR/TDT
  • Measuring insertion loss and return loss
  • Extracting dielectric constant of the laminate
  • Extracting dissipation factor of the laminate
  • Measuring the bandwidth of the interconnect
  • Identifying design features that contribute to
    excessive loss
  • TDR/cross talk
  • Measuring NEXT
  • Measuring FEXT
  • Emulating FEXT for different system rise times
  • Identifying design features that contribute to
    NEXT
  • Exploring the impact of terminations on NEXT and
    FEXT
  • Measuring ground bounce
  • Identifying design features that contribute to
    ground bounce
  • Emulating ground bounce noise for different
    system rise times
  • Differential TDR (DTDR)
  • Measuring each of the five impedance associated
    with a differential pair

34
Configuration for TDR/TDT Measurements
TDR stimulus
TDT response
TDR response
35
User Wizard for TDR/TDT operation
36
Example of TDR/TDT response from 8 inch long
microstrip transmission line on 20 mV/div and 500
psec/div scales
Transmitted response
Reflected response
37
TDR/TDT response converted into frequency domain
for return loss/insertion loss
Insertion loss of reference thru
Insertion loss of DUT
Return loss of DUT
38
Return and insertion loss of a 24 inch
interconnect on a motherboard with two
daughtercards
Return loss of DUT
Insertion loss of DUT
39
ADS modeling of a uniform 8 inch long microstrip,
showing the bandwidth of the simple model to be
12 GHz
Dk 4.43 H1 60 mils TanD 0.025 Len 8
inches W1 125 mils
BW of the model is 12 GHz
40
Measured insertion loss of a reference thru, a
uniform line (DUT-1) and a uniform line that is
part of a differential pair (DUT-2)
Insertion loss of reference thru
Insertion loss of DUT-1
Insertion loss of DUT-2
41
ADS model of the 9 inch long trace, modeling the
coupling to the adjacent, quiet line, showing the
bandwidth of the model to be 8 GHz
Dk 4.43 H1 60 mils TanD 0.025 Len 9
inches W1 125 mils S1 115 mils
42
Changing Separation between the two transmission
lines showing the impact on the insertion loss dip
Edge to edge spacing, in mils
50
75
100
125
150
Simulated stripline insertion loss
Similar coupled stripline w 125 mils, s 115
mils
43
Configuration for two port TDR measurements
TDR stimulus
Active or aggressor line
TDT response
TDR response
FEXT
NEXT
Quiet or victim line
44
Measurement of the NEXT on a quiet line using the
marker
45
Measuring both the NEXT and FEXT with the second
channel in the TDR
Measured at near end and at far end, all ends
terminated
46
Emulating the FEXT with different system rise
time responses with RT 100, 200, 500, 1nsec
Measured at near end, far ends of active and
quiet lines open
RT 1 nsec RT 500 psec RT 200 psec RT
100 psec
47
Measured TDR response of 24 inch long trace in a
mother board using markers to measure the
impedance in the daughter card and mother board
48
Measured NEXT and FEXT in a 24 inch long trace on
a mother board, with all ends terminated
TDR response
NEXT
FEXT
49
Measured cross talk in quiet line with worst case
termination
TDR response (port 1)
Measured at far end (port 2)
NEXT
FEXT
50
Tightly coupled pair of transmission lines with
small gaps in the return path that will generate
ground bounce
Short gap in the return path
Longer gap in the return path
51
TDR of a single ended transmission line crossing
gaps in the return path, showing the inductive
discontinuities
52
Measured ground bounce on the quiet line from
gaps in the return path
TDR response
Near end noise
53
Emulating impact of rise time on the ground
bounce noise in a pair of coupled lines with a
rise time of 500 psec
TDR response RT 500 psec
Near end noise RT 500 psec
54
Measured TDR response of a single line crossing a
large gap in the return path and the ground
bounce noise in the quiet line
TDR response
Near end noise
50 mV/div
FEXT
FEXT
55
Emulating ground bounce noise from large gap at
rise times of 100 psec and 1 nsec
TDR response RT 1 nsec
Near end noise RT 1 nsec
56
Configuration for differential pair
characterization
Line 1
Differential stimulus
Line 2
Line 1
Common stimulus
Line 2
57
DTDR Set up screen for differential measurements
58
Measured TDR response of a single transmission
line configured for the even mode, single ended
and odd mode
Even mode impedance
Single ended impedance
Odd mode impedance
59
Three impedances of a single line displayed
directed on an impedance scale
Even mode impedance
Single ended impedance
Odd mode impedance
60
Measured odd mode impedance of each line in a
differential pair, displayed directly on an
impedance scale
61
Measured even mode impedance of each line in a
differential pair, displayed directly on an
impedance scale
62
Measured differential impedance of a pair of
microstrip traces, displayed directly on an
impedance scale
63
Measured common impedance of a pair of microstrip
traces, displayed directly on an impedance scale
64
Comparison of the measured single ended impedance
and odd mode impedance of a single line in a long
motherboard trace
Single ended impedance
Odd mode impedance
65
Measured differential impedance of two different
twisted pair cables connected to a coax launch
Twisted pair in telephone cable
Twisted pair in cat V Ethernet cable
66
Measured reflected common signal from a coax to
twisted pair transition with an incident common
signal
Common impedance
Differential impedance
67
Measured differential impedance profile of a
differential pair crossing a wide gap in the
return path
Differential TDR
Single ended TDR
68
Emulating the differential impedance profile of a
differential signal crossing a large gap at four
different rise times
RT 100 psec RT 200 psec RT 500 psec RT
1 nsec
10 Ohms/div
69
Measured mode conversion from differential to
common signal due to an asymmetry on one line in
a pair
Received common signal component
DTDR response
Open far end
Small capacitive asymmetry on one line
SMA launch
70
Measured mode conversion on a differential pair
when the capacitive asymmetry is moved from one
line to the other
Capacitive asymmetry on line 1
Capacitive asymmetry on line 2
71
Case Study Typical PC Board
72
Ability of TDR Calibration to Improve TDR Rise
Time through Lossy or Dispersive Paths
  • Calibrated at end of 1m RF cables, measure shorts
    for fall time
  • Shorts and fall time are chosen to eliminate
    effect of fringing capacitance at the end of an
    unterminated line

Edge speed has improved from 79 to 25ps Yields
very clean pulse
73
Ability of TDR Calibration to Improve TDR Rise
Time through Lossy or Dispersive Paths
Differential PC board traces
  • Calibrated at right end of adapter (female 3.5mm)
  • Placed shorts there to characterize fall time
  • Improved edge speed from 553ps to 83ps
  • Much cleaner step

74
Benefits of TDR Calibration
  • Ability to correct for TDR step aberrations
  • Ability to improve edge speeds through lossy and
    dispersive lines
  • These two abilities yield better measurement
    accuracy of impedances in typical measurement
    situation (not at the front panel of the test
    instrument), particularly when looking at
    closely-spaced discontinuities
  • These same benefits are available when
    calibrating at probe tip using a calibration
    substrate

75
Ability of TDR Calibration to Improve Accuracy
through Lossy or Dispersive Paths
  • Calibrated at front panel of TDR module measured
    as two single ended-traces to transition into
    differential lines
  • For balanced lines, can add two single-ended
    measurements to obtain differential (cald at
    27.34 27.21 54.55 ohms raw 62 ohms)

76
Ability of TDR Calibration to Improve Accuracy
through Lossy or Dispersive Paths
Differential PC board traces
  • Calibrated at right end of cable (female SMA)
  • Measured impedance of 32in board of 1/3 of
    differential trace
  • Blue trace is uncalibrated yellow trace is
    calibrated
  • Note ability to more accurately see large
    discontinuities

77
Ability of TDR Calibration to Improve Accuracy
through Lossy or Dispersive Paths
Differential PC board traces
Differential PC Board traces
  • Calibrated at right end of male-to-male adapter
  • Measured impedance to third bend in differential
    trace
  • Red trace is uncalibrated yellow trace is
    calibrated
  • Note ability to more accurately see large
    discontinuities

78
Comparison of Results
Reference Planegtgt At Front Panel End of 1m Cables End of 1m Cables 12in Board
Calibrated 54.5 58.1 76.0
Uncalibrated 62 67.2 92.2
Other TDR instruments in the industry which lack
TDR calibration would roughly provide the
uncalibrated results
79
Viewing Correction Prior to Reference Plane
  • Measured loads at front panel scale at 2
    ohms/divn
  • Only noise from digital filter

80
Viewing Correction Prior to Reference Plane
Differential PC board traces
  • Calibrated at right end of cable
  • Measured 12in board
  • No aberrations prior to reference plane at 5 ohms
    per division

81
Viewing Correction Prior to Reference Plane
Differential PC board traces
Differential PC Board traces
  • Calibrated at right end of male-to-male adapter
  • Measured 32in board
  • Note only ripple from digital filter (set at
    10ohms per division to see impedance traces)
  • Setting Effective Rise Time to gt100ps eliminates
    ripple (compare to raw trace with fall time of
    550ps)

82
Comparison of Differential Stimulus
Agilent steps agree within 0.5-0.6 mV
Another suppliers steps agree within 9-10mV
83
Case Study - ChannelIncreasing the Rate on a
3Gb/s Backplane
  • XAUI at 3.125Gb/s
  • Four layers, each with differential transmit
    receive pairs
  • 16 length

84
Backplane Trace Layout
Channel Pairs
Test Ports
Test Ports
1
2
Tx1
1
Rx1
Tx2
2
Rx2
Tx3
3
Rx3
3
4
Tx4
4
Rx4
Layer
85
Assess Channel Impedance Using TDR
Yellow is Layer 1 Green is Layer 4
Ckt card vias
Connector
60
50
40
Backplane vias
Launch
86
Via Stubs Create Capacitive Loads
  • How is a Via Stub Created?
  • Signal current splits in two directions and sees
    two 50 ohm lines in parallel (25 ohms)
  • Excess capacitance is created by a 25 ohm segment
    of equivalent circuit
  • Reflections and poor signal integrity results

Layer 4
Layer 1
87
Assess Channel Using TDT
  • Blue is Layer 1 TDT
  • Red is Layer 4 TDT
  • Channels are different by 129ps

88
Single-ended S-Parameters
Return Loss or TDR
Insertion Loss or TDT
Near End Crosstalk (NEXT)
Far End Crosstalk (FEXT)
89
Single-ended and Differential S-Parameters
Balanced
Single-ended
Balanced port 1
Balanced port 2
Port 1
Port 2
Port 3
Port 4
Differential-Mode Stimulus
Common-Mode Stimulus
Stimulus
Port 1
Port 1
Port 2
Port 2
Differential-Mode Response
Port 1
Port 2
Response
Common-Mode Response
Port 1
Port 2
Naming Convention Smode res., mode stim., port
res., port stim.
90
Assess Channel Using S-parameters
  • S11 is Layer 1 Return Loss
  • S33 is Layer 4 Return Loss
  • S21 is Layer 1 Attenuation
  • S43 is Layer 4 Attenuation
  • Layer 4 has 10-15dB more loss
  • Can export data to Touchstone for analysis
  • Return loss is required by many standards
  • ISI usually increases with channel attenuation

91
Backplane Trace Connections - Crosstalk
Channel Pairs
Test Ports
Test Ports
1
Tx1
1
2
Rx1
Tx2
2
Rx2
Tx3
3
Rx3
3
Tx4
4
4
Rx4
Layer
92
Assess Crosstalk
  • Typical spec in standards is 20-26dB
  • Blue is Layer 1
  • Red is Layer 4
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