The George Washington University School of Engineering and Applied Science Department of Electrical and Computer Engineering

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The George Washington UniversitySchool of
Engineering and Applied ScienceDepartment of
Electrical and Computer Engineering

• ECE122 Lab 7
• Binary Counter

Ritu Bajpai August 18, 2009
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Introduction

• Sequential circuit that goes through a prescribed
  sequence of states
• Well design binary up-down counter
• Use T flip flops
• T flip flop designed by tying the inputs of JK
  flip flop together

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Characteristic Table
Q J K Q(t1)
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 0
Q T Q(t1)
0 0 0
0 1 1
1 0 1
1 1 0
JK flip-flop
T flip-flop
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JK flip flop
NAND LATCH
NAND LATCH
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JK flip flop output response
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4-bit up down binary counter
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Counter output response