The George Washington University School of Engineering and Applied Science Department of Electrical and Computer Engineering

1
The George Washington UniversitySchool of
Engineering and Applied ScienceDepartment of
Electrical and Computer Engineering

• ECE122 Lab 6
• State Machines

Ritu Bajpai Last revised on October 07, 2009
2
Introduction

• State table gives a time sequence of inputs,
  outputs and flip flop states.
• The information presented in the state table is
  graphically represented in a state diagram.
• A state equation is an algebraic expression that
  specifies the conditions for a flip-flop state
  transition.

3
Mealy and Moore State Machines

• Mealy state machine has less number of states and
  the output depends on the input
• Moore state machine, output only depends on the
  state

4
Problem for the lab

• Design Mealy and Moore machine to detect the
  sequence 1010 in a bit pattern.
• Draw state table
• Implement mealy state machine using D flip flops

5
Mealy state machine
Present State Next State Next State Output Output
Present State Input0 Input1 Input0 Input1
S1 (00) S1 (00) S2(01) 0 0
S2 (01) S3 (10) S2 (01) 0 0
S3 (10) S1 (00) S4 (11) 0 0
S4 (11) S3 (10) S2 (01) 1 0
6
Moore state machine
Present State Next State Next State Output
Present State Input0 Input1
S1 (000) S1(000) S2(001) 0
S2 (001) S3(010) S2(001) 0
S3 (010) S1(000) S4(011) 0
S4 (011) S3(010) S2(001) 0
S5 (100) S1(000) S4(011) 1
7
Implementation of Mealy SM using DFF
Inputs of combinational circuit Inputs of combinational circuit Inputs of combinational circuit Output of combinational circuit Output of combinational circuit Output of combinational circuit
Present state Present state Input Next state Next state Flip flop inputs Flip flop inputs output
A B x A B DA DB y
0 0 0 0 0 0 0 0
0 0 1 0 1 0 1 0
0 1 0 1 0 1 0 0
0 1 1 0 1 0 1 0
1 0 0 0 0 0 0 0
1 0 1 1 1 1 1 0
1 1 0 1 0 1 0 1
1 1 1 0 1 0 1 0
8
State equations
x/AB 00 01 11 10
0 0 1 1 0
1 0 0 0 1
x/AB 00 01 11 10
0 0 0 0 0
1 1 1 1 1
DBx
DAxBxAB yABx
9
Implementation
10
Output response
QA
QB
y
nQA
Clear
nQB
Clock
x