Design and Implementation of Low Power, Highly Integrated Receivers for Indoor Wireless Systems

1
Design and Implementation of Low Power, Highly
Integrated Receivers for Indoor Wireless Systems

• Dennis Yee
• Robert Brodersen
• University of California, Berkeley

2
Receivers General Considerations

• Main goal downconvert signal from fRF to
  baseband
• Hostile wireless environment
• weak desired signal
• strong neighboring interferers
• Circuit nonidealities
• limited filter attenuation, thermal noise,
  nonlinearities, LO phase noise, etc.

3
Heterodyne Architecture

• Most commonly used architecture in practice
• How is fIF chosen?

4
The Image Problem

• Image signal can be much stronger than the
  desired signal and must be attenuated before
  downconversion

• Trade-offs
• high IF relaxes RF filtering requirements
• low IF relaxes IF amplification and filtering
  requirements

5
Image Reject (Weaver) Architecture

• 30 - 45dB image rejection
• Image rejection limited by gain and phase
  mismatch
• Examples
• DECT Gray
• DCS1800 Steyaert
• GPS Lee

6
Direct Conversion Architecture

• Eliminates IF stage(s)
• if equivalent baseband signal is real, no image
  problem

• Design issues
• DC offsets (LO self-mixing, circuit mismatch,
  even-order distortion) and flicker noise

7
Direct Conversion Practical Considerations
Even-Order Distortion
LO Self-Mixing
Baseband Circuit Offset
Flicker Noise

• Possible solutions AC coupling, offset
  compensation

8
Prototype A Zero-IF Receiver for W-CDMA

• Zero-IF architecture for high integration and
  efficient power consumption

9
Framework for System/Hardware Co-Design

• Performance metric comparison
• Simulation to examine system/hardware interactions

10
Matlab Simulink Model of Zero-IF Receiver

• Techniques used to decrease simulation time
• Baseband equivalent modeling of RF signals
  (envelope simulation techniques)
• Compile design using Matlab Real-Time Workshop

11
Simulation Speed Issues

• RF signals occupy a narrow bandwidth relative to
  carrier
• Example 25MHz W-CDMA signal centered at 2GHz
• Simulation sampling rate determined by Nyquist
  Sampling Theorem
• fs gt 2fRF
• Simulation of RF signals can be really, really
  slow

12
Baseband-Equivalent Model

• Represent any real signal as

• Example an ideal RF signal centered at wc with
  baseband I and Q components, sI1(t) and sQ1(t)

• Eliminate dependence on wc by keeping track of
  time-varying coefficients sDC(t), sIn(t), and
  sQn(t)
• Sample time based on symbol period
• Complexity depends on number of harmonics

13
Simulation of Flicker Noise

• Pass white noise through a filter with frequency
  response 1/f 1/2
• Approximate transfer function by

14
System Simulation of Zero-IF Receiver

• pre-MUD
• post-MUD

• 10 users (equal power)
• 13.5dB receiver NF
• PLL -80dBc/Hz _at_ 100kHz
• 2.5 I/Q phase mismatch
• 82dB gain
• 4 gain mismatch
• IIP2 -11dBm
• IIP3 -18dBm
• 500kHz DC notch filter
• 20MHz Butterworth LPF
• 10-bit, 200MHz S-D ADC

Output SNR 15dB
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Receiver Prototype

• 0.25mm CMOS ST process
• Fully differential architecture
• LNA inductors used for 50W matching
• Mixer Gilbert quad
• PLL ring oscillator VCO
• ADC S-D 2-1-1 multi-bit cascade
• 5mm x 5mm

S-D ADC
SK Filter/ Notch
PLL
Mixer
LNA
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Simulated Performance

• Simulation of entire receiver using SpectreRF

transmit spectrum
receive spectrum
17
Analog Design Flow
behavioral

• Simulink
• system specifications
• rapid end-to-end simulation

structural/physical

• SpectreRF
• component performance
• periodic steady-state, envelope analyses
• HP ADS
• microwave design
• ASITIC
• integrated passive components

18
Session Talks

• Single-Chip Custom Transceiver Project
• Brian Limketkai
• Chinh Doan
• David Sobel
• Johan Vanderhaegen
• Single-Chip Multi-Standard Transceiver Project
• Martin Tsai