Design and Implementation of Low Power, Highly Integrated Receivers for Indoor Wireless Systems

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Design and Implementation of Low Power, Highly
Integrated Receivers for Indoor Wireless Systems

• Dennis Yee
• Robert Brodersen
• University of California, Berkeley

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Indoor Wireless Communications Systems

• Emerging applications for indoor wireless
  connectivity
• UMTS/IMT-2000, Bluetooth, InfoPad
• Portability imposes constraints on size and power
  consumption
• Unique features of indoor wireless systems
• Short distances between transmitter and receiver
• Partitions provide isolation
• Indoor wireless systems relaxed sensitivity and
  selectivity requirements

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Prototype A Zero-IF Receiver for W-CDMA

• Zero-IF architecture for high integration and
  efficient power consumption
• Low frequency notch filter eliminates DC offsets

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Framework for System/Hardware Codesign

• Performance metric comparison
• Simulation to examine system/hardware interactions

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Matlab Simulink Model of Zero-IF Receiver

• Techniques used to decrease simulation time
• Baseband equivalent modeling of RF signals
  (envelope simulation techniques)
• Compile design using Matlab Real-Time Workshop

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System Simulation of Zero-IF Receiver

• pre-MUD
• post-MUD

• 10 users (equal power)
• 13.5dB receiver NF
• PLL -80dBc/Hz _at_ 100kHz
• 2.5 I/Q phase mismatch
• 82dB gain
• 4 gain mismatch
• IIP2 -11dBm
• IIP3 -18dBm
• 500kHz DC notch filter
• 20MHz Butterworth LPF
• 10-bit, 200MHz S-D ADC

Output SNR 15dB
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LNA Design I

• Common-source configuration
• Preliminary simulation results using HP ADS
  (includes drain-induced gate current noise)

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LNA Design II

• Power consumption 6mW
• On-chip inductors used for 50W matching and tuned
  load

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Inductor Test Structures Measured Results

• Measurements verified in HP Momentum simulator
• For low resistivity substrates, eddy currents
  limit achievable Q