VLSI Arithmetic Adders

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VLSI ArithmeticAdders

• Prof. Vojin G. Oklobdzija
• University of California
• http//www.ece.ucdavis.edu/acsel

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Introduction

• Digital Computer Arithmetic belongs to Computer
  Architecture, however, it is also an aspect of
  logic design.
• The objective of Computer Arithmetic is to
  develop appropriate algorithms that are utilizing
  available hardware in the most efficient way.
• Ultimately, speed, power and chip area are the
  most often used measures, making a strong link
  between the algorithms and technology of
  implementation.

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Basic Operations

• Addition
• Multiplication
• Multiply-Add
• Division
• Evaluation of Functions
• Multi-Media

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Addition of Binary Numbers
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Addition of Binary Numbers
Full Adder. The full adder is the fundamental
building block of most arithmetic circuits
  The sum and carry outputs are described
as
ai
bi
Full Adder
Cin
Cout
si
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Addition of Binary Numbers
Propagate
Generate
Propagate
Generate
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Full-Adder Implementation

• Full Adder operations is defined by equations

Carry-Propagate and Carry-Generate gi
One-bit adder could be implemented as shown
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High-Speed Addition
One-bit adder could be implemented more
efficiently because MUX is faster
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The Ripple-Carry Adder
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The Ripple-Carry Adder
From Rabaey
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Inversion Property
From Rabaey
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Minimize Critical Path by Reducing Inverting
Stages
From Rabaey
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Ripple Carry Adder

• Carry-Chain of an RCA implemented using
  multiplexer from the standard cell library

Critical Path
Oklobdzija, ISCAS88
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Manchester Carry-Chain Realization of the Carry
Path

• Simple and very popular scheme for implementation
  of carry signal path

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Original Design
T. Kilburn, D. B. G. Edwards, D. Aspinall,
"Parallel Addition in Digital Computers A New
Fast "Carry" Circuit", Proceedings of IEE, Vol.
106, pt. B, p. 464, September 1959.
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Carry-Skip Adder
MacSorley, Proc IRE 1/61 Lehman, Burla, IRE Trans
on Comp, 12/61
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Carry-Skip Adder
Bypass
From Rabaey
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Carry-Skip Adder N-bits, k-bits/group, rN/k
groups
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Carry-Skip Adder
k
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Variable Block Adder(Oklobdzija, Barnes IBM
1985)
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Carry-chain of a 32-bit Variable Block
Adder(Oklobdzija, Barnes IBM 1985)
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Carry-chain of a 32-bit Variable Block
Adder(Oklobdzija, Barnes IBM 1985)
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5
5
4
4
3
3
D9
1
1
Any-point-to-any-point delay 9 D as compared
to 12 D for CSKA
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Delay Calculation for Variable Block
Adder(Oklobdzija, Barnes IBM 1985)
Delay model
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Variable Block Adder(Oklobdzija, Barnes IBM
1985)
Variable Group Length
Oklobdzija, Barnes, Arith85
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Carry-chain of a 32-bit Variable Block
Adder(Oklobdzija, Barnes IBM 1985)
Variable Block Lengths

• No closed form solution for delay
• It is a dynamic programming problem

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Delay Comparison Variable Block Adder
VBA
CLA
VBA- Multi-Level
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VLSI ArithmeticLecture 4

• Prof. Vojin G. Oklobdzija
• University of California
• http//www.ece.ucdavis.edu/acsel

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Carry-Lookahead Adder(Weinberger and Smith, 1958)
ARITH-13 Presenting Achievement Award to Arnold
Weinberger of IBM (who invented CLA adder in 1958)
Ref A. Weinberger and J. L. Smith, A Logic for
High-Speed Addition, National Bureau of
Standards, Circ. 591, p.3-12, 1958.
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CLA Definitions One-bit adder

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CLA Definitions 4-bit Adder
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Carry-Lookahead Adder 4-bits
Gj
Pj
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Carry-Lookahead Adder
One gate delay D to calculate p, g
One D to calculate P and two for G
Three gate delays To calculate C4(j1)
Compare that to 8 D in RCA !
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Carry-Lookahead Adder(Weinberger and Smith)
   
Additional two gate delays
C16 will take a total of 5D vs. 32D for RCA !
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32-bit Carry Lookahead Adder
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Carry-Lookahead Adder(Weinberger and Smith
original derivation, 1958 )
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Carry-Lookahead Adder(Weinberger and Smith
original derivation )
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Carry-Lookahead Adder (Weinberger and
Smith)please notice the similarity with
Parallel-Prefix Adders !
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Carry-Lookahead Adder (Weinberger and
Smith)please notice the similarity with
Parallel-Prefix Adders !
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Motorola CLA Implementation Example

• A. Naini, D. Bearden and W. Anderson, A 4.5nS
  96b CMOS Adder Design,
• Proceedings of the IEEE Custom Integrated
  Circuits Conference, May 3-6, 1992.

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Critical path in Motorola's 64-bit CLA
4.8nS
1.05nS
1.7nS
3.75nS
2.7nS
2.0nS
2.35nS
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Motorola's 64-bit CLAconventional PG Block
no better situation here !
carry ripples locally 5-transistors in the path
Basically, this is MCC performance with
Carry-Skip. One should not expect any better
results than VBA.
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Motorola's 64-bit CLAModified PG Block
Intermediate propagate signals Pi0 are
generated to speed-up C3
still critical path resembles MCC
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Motorola's 64-bit CLA
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