EECE 631 Microcomputer System Design Lecture 17

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EECE 631Microcomputer System DesignLecture 17

• Spring 2008
• Chris Lewis
• clewis_at_ksu.edu

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Timing

• Want to add a memory element
• Memory
• Peripheral
• Can the CPU work with that device?
• Insure that it will always work, not just
  typically work
• How many wait states are required?

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Basic Idea of Timing

• A signal originates from one chip
• A signal is required by another chip
• Originating chip gives time specifications that
  it guarantees it will meet.
• These guarantees are ultimately related to a
  clock signal, but often given relative to another
  signal
• Receiving chip gives timing requirements on
  signals.
• These requirements are ultimately related to a
  clock signal, but often given relative to another
  signal.
• Often chips perform much better than the
  specifications provided. That is, a memory chip
  will work even though it is not guaranteed to do
  so.. Until it gets too hot/cold etc.
• Always design to max/mins, not to typicals.

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Simple Example

• Consider a clocked flip flop
• Set up time How long stable input prior to clock
• Hold time How long stable input after clock
• What happens if these conditions not met?

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Rise and Fall times 10-90
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AT91SAM7SE (external memory)
Clock Clock Enable Chip Select Bank Select Row
Signal Column Signal Write enable Data mask
enable Address Data
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SDRAM controllerSDRAMC
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What is this?
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Table of Specs
Clock enable guaranteed to be stable (high)
before a Rising edge of the clock Clock enable
guaranteed to remain stable (high) after rising
edge of clock Same for low
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Typical Write Timing
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Typical Write Timing
1. Address is selected
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Typical Write Timing
2. Address is selected And Data is presented,
Which first?
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Typical Write Timing
3. Pulse WE
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Typical Write Timing
4. Address and Data become invalid
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Typical Write Timing
3. CS rises, and we are done
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Write Parameters
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Requirement-VS-Guarantee

• Device providing signal guarantees
• Device receiving signal sets requirements
• Basic Timing Question
• DO Guarantees Meet Requirements
• Write an inequality equation for each requirement
  and solve.
• Always use worst case.

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Typical Memory Chip
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Read Terms
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Write Terms
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Read Cycle Timing
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Write Cycle Timing (1)
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Write Cycle Timing (2)