Title: Ttulo do Trabalho
1Catholic University, PUCRS (Brazil) Faculty of
Informatics and Faculty of Engineering Embedded
Systems Research Group lthttp//www.inf.pucrs.br/gs
egt
CCSDS TC/TM Interface Targeting Reconfigurable
Logic by Eduardo Augusto Bezerra CTA/ITA,
São José dos Campos, 23-24 November 2004.
2Summary
- Supporting Team GSE and Collaborators
- Motivation, Objectives and Contributions
- Design Decisions
- Design Methodology and Strategy
- Drawbacks
- Conclusions
- Contact Details
3Supporting Team The GSE Group
Application Area Emphasis embedded software and
hardware for sensors and dedicate computing
systems
Research Emphasis Embedded Systems
Space Systems
Mobility and Pervasive Computing
Precision Farming
4Supporting Team The Space Science Centre
5Supporting Team The GAPH Group
Application Area Emphasis Telecom Systems
Research Emphasis SoC
Modelling, design and validation at systemic
levels
Modular Systems Construction
IP Construction
Reconfigurable Hardware Construction
Hardware Virtualisation
IP cores
Reconfigurable Systems
6Supporting Team Collaborators
The University of Sussex (UK) Space Science
Centre, EIT http//www.sussex.ac.uk/space-science
Faculty of Engineering, PUCRS Systems, Computing
and Communications Group http//www.ee.pucrs.br/s
isc
IPCT, PUCRS Microgravity Laboratory http//www.ipc
t.pucrs.br/microg
Faculty of Informatics, PUCRS Hardware Design Aid
Group http//www.inf.pucrs.br/gaph
7Summary
- Supporting Team GSE and Collaborators
- Motivation, Objectives and Contributions
- Design Decisions
- Design Methodology and Strategy
- Drawbacks
- Conclusions
- Contact Details
8Motivation, Objectives and Contributions
- Brazilian space program is interested in the use
of FPGAs for the implementation of on-board
processing systems - Main objective Design and implementation of a
CCSDS telecommand and telemetry system in an
FPGA - Investigation of the use of configurable
computing (FPGAs) to substitute the traditional
approach (microprocessors) employed in the design
of on-board computers
9Motivation, Objectives and Contributions
- Development of a configurable system to be used
in space applications - Investigation of high level languages for
hardware description (e.g. Java, C) - Investigation/definition of fault-tolerance
strategies for configurable computers - High performance with low clock and less power
consumption
10Motivation, Objectives and Contributions
- Flexibility of developing hardware in a similar
way as SW (bug fixes, system upgrades), with no
HW changes - Microprocessors applications have to adapt to
the architecture available. FPGAs architecture
adapts to the application - Flexibility to define as many independent memory
modules (distributed memory) as necessary,
reducing the von Neumann bus bottleneck - Modern FPGAs have architectures suitable for
arithmetic and DSP applications.
11Motivation, Objectives and Contributions
- HW/SW co-design is too complex ? investigation of
pure hardware solutions.
Modelling/System Description
(
SystemC
,
SDL, CSP, Java, ...)
Validation
(Co
-
Simulation,
Formal Verification)
HW/SW Partitioning
HW (HDL, occam)
SW (C, occam)
Co
-
Synthesis
Synthesis
Compilation
Software
Prototiping
components
Hardware
(Library)
components
FPGA
FPGA
FPGA
µ
P
(IP cores)
FPGA
analogic
memory
memory
SoC
12Summary
- Supporting Team GSE and Collaborators
- Motivation, Objectives and Contributions
- Design Decisions
- Design Methodology and Strategy
- Drawbacks
- Conclusions
- Contact Details
13Design Decisions The Simulation Environment
Prototyping platform selection target FPGA,
prototyping board, hardware description language,
14Design Decisions The Description Language Issue
- The first activity in a project should be to
identify the problems complexity. - In complex (and large) projects, the solution
will certainly involve some sort of systemic
approach. - In mid-size projects a behavioural HDL solution
may be sufficient. - In small projects a schematic entry or structural
HDL solution may be a better option, but just in
cases where designers have a hardware background.
15Design Decisions Target Device Selection
- Manufacturers of military and/or rad-hard FPGA
devices - Actel Corp. lthttp//www.actel.comgt
- Altera Corp. lthttp//www.altera.comgt
- Atmel Corp. lthttp//www.atmel.comgt
- Chip Express lthttp//www.chipexpress.comgt
- Gatefield Corp. lthttp//www.gatefield.comgt
- Lucent Corp. lthttp//www.lucent.com/micro/fpgagt
- Mission Research Corp. lthttp//www.mrcabq.comgt
- Quicklogic Corp. lthttp//www.quicklogic.comgt
- Xilinx Corp. lthttp//www.xilinx.comgt
16Summary
- Supporting Team GSE and Collaborators
- Motivation, Objectives and Contributions
- Design Decisions
- Design Methodology and Strategy
- Drawbacks
- Conclusions
- Contact Details
17Design Methodology and Strategy
- CCSDS
- Consultative Committee for Space Data Systems
- Employed in a large number of scientific and
commercial spacecraft. - Allows reduced costs for on-board, ground and
test equipment, as well as for spacecraft testing
in in-orbit operation. - Standard space industry communication protocol.
Telecommand Transmit
Telecommand Receive
Frame Processing
Frame Processing
Telemetry Receive
Telemetry Transmit
R-S Encoder
R-S Decoder
Space Segment
Ground Segment
18Design Methodology and Strategy
FPGA
AMBA bus
Leon 2 Sparc V8 microprocessor
HurriCANe CAN interface
First step A soft core microprocessor (Leon 2)
runs a minimal CCSDS TC/TM implementation. The
system uses the AMBA bus for cores
interconnection, and a CAN core for connecting
external modules.
19Design Methodology and Strategy
FPGA
?
?
?
AMBA bus
Leon 2 Sparc V8 microprocessor
HurriCANe CAN interface
End objective Selection of some modules of the
protocol suitable for HW implementation. The
modules should be designed as peripherals for the
Leon microprocessor.
20Design Methodology and Strategy
21Design Methodology and Strategy
22Design Methodology and Strategy
23Design Methodology and Strategy
Dependability Improvement Signature
Analysis-Driven Refresh Without FPGA Replication
24Design Methodology and Strategy
Dependability Improvement Masking Connectivity
Faults
25Summary
- Supporting Team GSE and Collaborators
- Motivation, Objectives and Contributions
- Design Decisions
- Design Methodology and Strategy
- Drawbacks
- Conclusions
- Contact Details
26Drawbacks
- Synthesis tools for high level languages are
still inefficient - VHDL is device independent, but it is not
synthesis tool independent - For good results, the designer is required to
have a good knowledge of the FPGA architecture,
synthesis tools functionality, and how to program
in HDL for synthesis - An acceptable VHDL description, suitable for
synthesis, is in a level of abstraction lower
then Assembly language, since the designer has to
think in terms of flip-flops and multiplexers - FPGAs are still expensive
- Skillful people in this field is hard to find.
27Summary
- Supporting Team GSE and Collaborators
- Motivation, Objectives and Contributions
- Design Decisions
- Design Methodology and Strategy
- Drawbacks
- Conclusions
- Contact Details
28Conclusions
- The proposed project is feasible, but the right
personal must be found - A close contact with Surrey and Sussex Space
groups is important for the project success - The whole CCSDS TM/TC interface is not proper
for a pure hardware implementation - In a first moment, the whole system will be
prototyped in an FPGA as a pure software
implementation for a soft core RISC
microprocessor - Gradually, modules of the system will be
converted into hardware as IP cores.
29Summary
- Supporting Team GSE and Collaborators
- Motivation, Objectives and Contributions
- Design Decisions
- Design Methodology and Strategy
- Drawbacks
- Conclusions
- Contact Details
30Contact Details
Eduardo Augusto Bezerra Embedded Systems Research
Group (GSE) Faculdade de Informática, PUCRS Av.
Ipiranga, 6681, Porto Alegre, RS, Brazil Email
bezerra_at_inf.pucrs.br Web http//www.inf.pucrs.br/
eduardob Web http//www.inf.pucrs.br/gse Tel.
55 (51) 3320 3611 or 55 (51) 3320 3695
31Useful Links
CCSDS http//www.ccsds.org Sussex University
http//www.sussex.ac.uk/space-science Surrey
University http//www.ee.surrey.ac.uk/SSC/ SSTL
http//www.sstl.co.uk/ SatServ
http//www.satserv.nl ESA http//www.esa.int Leon
http//www.gaisler.com/products/leon2/leon.html
GSE http//www.inf.pucrs.br/gse