Title: Experience with the Beetle1'2
1Experience with the Beetle1.2
- 80MHz Digital Switching Noise on the analog lines
- Common Mode Problem
- How to kill a Beetle chip
- Conclusions
Stephan Eisenhardt University of Edinburgh
LHCb week, Electronics, 19.05.2003
280 MHz digital switching noise
- As discussed at VELO Beetle meeting 30.04.2003
- 80 MHz noise on analogue outputs and DataValid
- Stems from digital circuit and multiplexer
- (tested by cut in power line internal to the
Beetle) - Different claims whether pos. or neg. parts of
LVDS signals have larger contribution - No understanding at that time
- Meanwhile understood, fix for Beetle1.3 proposed
(Nigel)
data frame (128 ?4)
data frame (128 ?1)
DataValid
1-port data out
4-port data out
3Edinburgh Setup
- Beetle1.2 data frames pedestal
- MaPMT test pulses
Single pedestal event
Beetle1.2
solder bridges
128 ? 1 data frame
12-channel read-out
Testpulse mode
single base
LED direct or via optical fiber
8 dynode MaPMT
4Common Mode Problem I
- We use direct coupling for the signals (not
capacitive decoupling) - We need as CM of lt2Noise for the binary readout
of the MaPMT - We find
- For bare HD board direct coupling CM of 50 of
header bits - For bare HD board capacitive coupling CM not
visible on scope
HD board without front-end
5Common Mode Problem II
- By attaching the front-end we find
- CM increases by factor 4
- (that fills the dynamic range of our ADC)
- Main components inducing CM
- tracks on HD board
- cable connection to base
- MaPMT itself
- Shielding of cables reduces CM to lt50 of maximum
- (limit of possible reduction not yet clear, but
it looks very hard to get it down to our needs) - No trigger phase or other parameter dependence
found - Looks like a ringing and/or RF problem, probably
induced by inductance in GND line - Board Beetle is designed with low inductivity in
the front-end - But we still may be forced to go for and analog
readout option!!!
with front-end and MaPMT
6How to kill a Beetle chip
- _at_ Heidelberg
- supply voltages gt2.7V with 50? serial resistors
at the output - Understood as too high current density in the
output (multiplexer?) - Can be prevented by higher serial resistor
(proposed 300?) - Seems not very worrying as there is a hardware
fix (off-chip) - _at_ Edinburgh (MaPMT)
- short circuit between supply voltage 2.5V and
GND on HD mother board - First (still with 50? serial termination)
software reset feature broken, i.e. fault in the
control logic but rest of chip still working - Second (now with 130 ? serial termination we
need that to cover the 01.5V range of our ADC)
fault in the pipeline, i.e. no output at all - Due to voltage spikes?
- Related to overvoltage problem?
- Worrying, as in the final detector a voltage
glitch could kill many of your chips - _at_ CERN (VELO)
- sudden death over night due to unknown reason
- Very worrying, what is going on there? (again
voltage spike?) - This is not yet understood
7Conclusions
- The Beetle still is fun to work with !!
- Second hand information tells that the 80MHz
noise will be under control in Beetle1.3 - The source of common mode is not yet finally
understood - The level of common mode with the direct input
option may prove to be a killer for the binary
readout option of the MaPMT, - i.e. we would have to go for the more expensive
analog readout option - The causes of chip kills have to be understood
and fixed, - as a full scale system cannot live with the
thread of a large number of chips damaged by e.g.
a power surge
8Spare slides
93-bit comparator in Beetle1.2
- from discussions with Hans Verkoojien
- 1 MIP 22000e- 1538mV
- comparator DC offsets ? 26mV (3?)
- trade off
- range covered at a time vs. resolution,
- e.g. 140mV, 220.0mV, 410.0mV or 85.0mV
- Comparator buffer gain 0.7
- Beetle1.2MA0 12-dyn 300000e- ? 30mV
- Signal 300000e- ? 0.730mV 21mV
- Noise 7500e- ? 0.70.75mV 0.525mV
- Beetle1.2 8-dyn 50000e- ? 85mV
- Signal 50000e- ? 0.785mV 60mV
- Noise 1000e- ? 0.71.7mV 1.2mV
Idelta Vdelta Vdelta range Vdelta step
size 0.125?A ? 2.5mV 04.375mV ? 0.625mV
? 0.250?A ? 5.0mV 08.75mV ? 1.25mV
? 0.625?A ? 12.5mV 021.875mV ? 3.125mV
? 1.250?A ? 25.0mV 043.75mV ? 6.25mV ?
No access to negative DC offsets!!
105-bit comparator in Beetle1.3 (08/2003)
- from discussions with Hans Verkoojien
- 1 MIP 22000e- 1538mV
- comparator DC offsets ? 15mV (3?)
- wrt. Beetle1.2
- comparator input buffer gain 0.7 ? 1.0
- DC offsets reduced due to removal of one buffer
- Beetle1.3MA0 12-dyn 300000e- ? 30mV
- Signal 300000e- ? 1.030mV 30mV
- Noise 7500e- ? 1.00.75mV 0.75mV
- Beetle1.3 8-dyn 50000e- ? 85mV
- Signal 50000e- ? 1.085mV 85mV
- Noise 1000e- ? 1.01.7mV 1.7mV
Idelta
Imain
Idelta- Imain
Idelta Vdelta Vdelta range Vdelta step
size 0.125?A ? 2.5mV 04.84375mV 0.15625mV 0.625
?A ? 12.5mV 024.21875mV ? 0.78125mV ? 1.000?A ?
20.0mV 038.75mV ? 1.25mV ?
Access to negative DC offsets possible!
11Beetle1.2 Heidelberg board I
board at Oxford
- at Edinburgh
- Heidelberg mother- and daughter board
- Beetle1.2 mounted on daughter board
- Beetle1.2MA0 as soon as available
- connect 8/12-stage MaPMT to this read-out
daughterboard with Beetle1.1
motherboard
- What can be done with it
- readout up to 12 MaPMT channels of 8 dynode stage
MaPMT - analog and binary readout
- 128 ? 1 and 128 ? 4 multiplexing (in 3600/900ns
per event) - existing FED/MIDAS/VME DAQ can read this out
- proof of principle for Beetle1.2 / 8-dynode MaPMT
combination - proof of principle for Beetle1.2MA0 / 12-dynode
MaPMT combination
12How to readout a full MaPMT?
design PCB board Beetle
- allows readout for 1 Beetle1.2(MA0) and 2(1)
MaPMTs per board - no Kapton cables, flexible for 3x3 and 4x4
geometry in the test beam - not yet settled symmetric GND lines? (PGA 10x8
instead of 9x8) - time scale for production 1 engineer x 2 months
- main tasks lay out signal traces pitch adaptor