Title: VLSI Layout Algorithms
1X(ABCD) (AD)(A(BC)) Y (A(BC)AC
DA(BCD))
VLSI Layout Algorithms CSE 6404
Dr. Md. Saidur Rahman
2Is it possible to lay the circuit on a single
layered PCB?
ELECTRONIC CIRCUIT
3Is it possible to lay the circuit on a single
layered PCB?
POSSIBLE !
4Is it possible to lay the circuit on a single
layered PCB?
NOT POSSIBLE
ELECTRONIC CIRCUIT
5A planar graph
non-planar graph
planar graph
6Kuratowskis Theorem
A graph is planar if and only if it contains
neither a subdivision of K5 nor a subdiision of
K3,3.
7Kuratowskis Theorem
A graph is planar if and only if it contains
neither a subdivision of K5 nor a subdiision of
K3,3.
Planarity testing algorithm based on Kuratowskis
theorem.
Time complexity exponential.
8A polynomial time algorithm
AP 61, Gol63, Shi69
Idea decompose a graph with respect to a cycle.
9Pieces
C
10Pieces
attachment
C
11Connected components after deleting C
12attachment
13P3
P2
P1
P4
P5
P6
Six pieces
14Separating cycle and nonseparating cycle
Nonseparating cycle
Separating cycle
15Lemma
Let G be a biconnected graph and let C be a
nonseparating cycle of G with piece P. If P is
not a path, the G has a separating cycle C
consisting of a subpath of C plus a path of P
between two attachmet.
16Interlace
Two pieces of G, with respect to C, interlace if
they cannot be drawn on the same side of C
without violating planarity.
P1
P2
P1 and P2 interlace.
17Interlacement Graph
The interlacement graph of the pieces of G, with
respect to C, is the graph whose vertices are the
pieces of G and whose edges are the pairs of
pieces that interlace.
P6
P5
P4
P1
P3
P2
interlacement graph
18Theorem
A biconnected graph G with a cycle C is planar if
and only if the following two conditions hold.
- For each piece P of G with respect to C, the
graph obtained by adding P to C is planar.
- The interlacement graph of the pieces of G, with
respect to C, is bipartite.
The theorem above leads to a recursive algorithm.
19Time complexity
Computing pieces
O(n)
O(n2)
Construction of Interlacement graph
Cheking bipartite graph
O(n2)
O(n)
Depth of recursion
O(n3)
Overall
20Linear Algorithms
Hopcroft and tarjan, 1974
Planarity testing
Booth and Lueker, 1976
Chiba et al, 1985
Finding planar embedding
Shih and Hsu, 1992-1999
21The circuit is not planar.
How many PCBs are required?
22Thickness of a graph t(G)
The thickness t(G) of a graph G is defined to be
the smallest number of planar graphs that can be
superimposed to form G.
23Euler Theorem
Let G be a connected plane graph, and let n, m, f
denote respectively the number of vertices, edges
and faces of G. Then
For a planar graph
24For a planar graph
Thickness
25Thank you.