Why Programmable Logic

1
Introduction
2
Why Programmable Logic ?

• Custom logic without NRE
• needed for product differentiation
• Fast time to market
• shorter design life in a competitive world
• In-system programmability
• simpler manufacturing logistics
• easy field upgrade
• feature swapping

3
Users Expect

• Logic capacity
• 50,000 to a million gates
• Clock speed
• 100 MHz and above
• Cost
• reasonable premium over ASICs
• Design effort and time
• powerful synthesis, fast compile times
• Power consumption
• must stay within limits

4
Recent Developments

• Deep submicron arrivedunexpectedly early
• 0.5µ-0.35µ-0.25µ-0.18µ-?
• Deep submicron technologyprovides for free
• speed, density, low cost
• But it requires voltage migration
• 5 V - 3.3 V - 2.5 V - 1.8 V - 1.5 V - ?

5
Design Alternatives

• Microprocessors
• Ideal, if fast enough
• Gates, MSI, PALs
• Outdated, inefficient inflexible
• Dedicated Standard Chip Sets
• Cheap, but no product differentiation
• ASICs
• Only for rock-stable, high-volume designs
• Programmable Logic
• For flexibility and performance

6
ASICs Are Becoming Less Attractive

• Non-recurring engineering cost increases
• more masking steps, more expensive masks
• Minimum order quantity rises
• larger wafers, smaller die
• Silicon capability exceeds user requirements
• Suppliers are leaving this overly competitive
  market

7
FPGAs Are Gaining Acceptance
100

• gt 20x Bigger
• gt 5x Faster
• gt 50x Cheaper

Capacity
Speed
Price
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Year
8
FPGAs Are Good Enough

• Adequate capacity, performance, price
• 200,000 gates, 85 MHz in 1998
• 1,000,000 gates, 200 MHz in 1999
• Standard product advantages
• steep learning curve, cost decline
• performance gain, speed binning
• IC manufacturing is best at mass-production
• custom devices have an inherent disadvantage

9
FPGAs are Good Enough Better

• Deep submicron ASIC design is difficult
• second-order effects burden the traditional logic
  abstraction
• system designer needs help from EE
• Verification is very time consuming
• Hardware/software integration is delayed
• until a working chip is delivered.

10
FPGAs Are Better

• User can focus on logic, not circuits
• Xilinx solves all circuit problems
• clock delay and skew
• interconnect delay
• crosstalk
• I/O standards
• FPGAs are 100 tested by generic test methods
• Easy verification, incremental design
• Early hardware/software integration

11
FPGAs Are Better Vastly Superior

• Avoid the ASIC re-spin cost
• design error or market change
• Avoid the ASIC inventory risk
• over- or under-inventory
• obsolescence
• Reprogrammability
• last-minute design modifications
• last-step system customization
• field hardware upgrades
• reconfiguration per application
• reconfiguration per task
• ASICs will never offer these features

12
The Programmable Frontier

• Then 1998
• 250k gates
• 100 MHz
• 5

• Now 1999
• 1 Million gates
• 170 MHz FIFO
• 420 MHz frequency counter
• 295 for SpartanXL
• 1 per Logic Cell
• 120 for XC9500XL
• 3 per Macrocell

Four times bigger and twice as fast at half the
price In ONE year!
13
CPLDs Complement FPGAs

• CPLD strengths
• Wide address decoding
• Synchronous state machines
• Short combinatorial pin-to-pin delays
• Ideal for glue logic
• Low-cost
• Single-chip
• Non-volatile
• In-System Programmable
• Quick and easy to use

14
The Compelling ConclusionProgrammable is the
Way to Go!

• FPGAs provide performance and flexibility
• The performance of custom-hardware
• The ease of design and inherent flexibility of a
  microprocessor solution
• FPGAs avoid the risks of ASICs
• The design risk
• The time-to-market risk
• The inventory risk
• CPLDs provide a fast, low-cost alternative
• Good for simple designs

15
Silicon Xpresso

• Interactive web-based design tools and support
• WebFITTER
• software release 1.5i
• support.xilinx.com
• Internet Team-based Design (ITD)
• Internet Reconfigurable Logic
• Tools for the end product
• Java API for Boundary Scan
• JBits
• Remote debugging and field upgrades
• Internet Appliances

Use the web to improve hardware design
productivityandenable Internet-reconfigurable
applications for YOUR customers
16
Xilinx Solutions in This Seminar

• Simple, Low-cost Solutions
• 100MHz System Solutions
• Design Productivity Solutions

17
Simple, Low-cost Solutions

• Xilinx offers low-cost CPLD and FPGA devices and
  a low-cost Foundation software package
• The devices are fast and have systems-oriented
  features
• The software is powerful and easy to use.

You need not be rich or a genius to use our
programmable logic
18
100MHz System Solutions

• The Virtex family provides efficient solutions
  for
• Electrical and thermal issues
• I/O, logic, and memory design
• Alliance software provides powerful tools for a
  variety of design styles

You can achievereliable and predictable
performance automatically
19
Design Productivity Solutions

• Designs are getting larger and more complex
• Design times are getting shorter
• Fast time-to-market is crucial
• Xilinx offers design methodologies and
  well-documented, proven logic cores that
  increase productivity and reduce risk

You can create large FPGA designswithout having
to re-invent the wheel
20
Three new Xilinx families

• SpartanXL
• 3.3-V low-cost FPGA
• 5,000 to 40,000 gates
• XC9500XL
• 3.3-V In-System Programmable CPLD
• up to 200 MHz
• Virtex
• next-generation FPGA with system features
• up to a million gates

This seminar highlights the applications of
these three families
21
Families Not In This Seminar

• XC3000A, XC3100A
• for existing designs
• XC4000E, EX, XL, XLA, XV
• the industrys most successful FPGAs
• XC5200
• for existing designs
• XC1700
• Serial configuration PROMs for all families

22
Xilinx Solutions in This Seminar

• Simple, Low-cost Solutions
• 100MHz System Solutions
• Design Productivity Solutions