Programmable logic Devices-ROM 2

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Programmable logic Devices-ROM 2
Lecture 14

• Prof. Sin-Min Lee
• Department of Computer Science
• San Jose State University

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Programmable logic arrays (PLA's)

• The ROM implementation of a function may become
  quite expensive for functions with a large number
  of variables, because all potential minterms of
  the function are implemented, whether or not they
  are needed. A programmable logic array (PLA)
  requires that only the minterms required for a
  function be implemented, and allows the
  implementation of several functions
  simultaneously. Moreover, the functions can be
  implemented directly from their minterm forms
  (although it is often possible to eliminate some
  of the minterms, further decreasing the cost of
  the PLA).

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AND'' plane
OR'' plane
The PLA can be considered as a direct POS (or
SOP) implementation of a set of switching
functions, with a set of AND functions followed
by a set of OR functions. A PLA is often said
to have an AND'' plane followed by an OR''
plane.
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A seven-segment display is used for displaying
any one of the decimal digits 0 through 9. A
BCD-to-seven-segment decoder accepts a decimal
digit in BCD and generates the corresponding
seven-segment code. A block diagram
representation of the BCD-to-seve n-segment code
conversion is depicted in the following figure
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