Synopsis Primetime

1
Synopsis Primetime

• Stand-alone full chip, gate-level static timing
  analyzer.
• It analyzes the timing of large, synchronous,
  digital ASICs.
• Pre-layout static timing analysis

2
Static Timing Analysis

• Setup and hold checks
• Recovery and removal checks
• Clock pulse width checks
• Clock gating checks

3
Design Analysis

• Unclocked registers
• Unconstrained timing endpoints
• Master-slave clock separation
• Multiple clocked registers
• Level-sensitive clocking
• Combinational feedback loops
• Design rule checks (maximum capacitance, maximum
  transition time, and maximum fanout)

4
Inputs -gt Outputs

• Design file
• Synopsys database files (.db)
• Verilog netlist files
• Electronic Data Interchange Format (EDIF) netlist
  files
• VHDL netlist files
• Set up the operating conditions, wireload models,
  port load, drive, and transition time.
• Define the clock period, waveform, uncertainty,
  and latency.
• Specify the input and output port delays.
• Set multicycle paths.
• Set false paths.
• Specify minimum and maximum delays, path
  segmentation, and disabled arcs.

• flip-flops with violations
• setup and hold violations
• timing paths
• rising edge input timing and falling edge input
  timing of all paths in the design
• critical path for each clock group
• timing report for each clock group
• electrical design rule violations

5
Benefits

• Tight integration with other Synopsis tools
• Standalone (lower memory usage than Design
  Compiler, better performance)
• Primetime SI cross talk aware analysis

6
Alternatives

• Dataquest (2004) Synopsis holds 93 of STA
  market share
• ViewLogic Motive
• Bought by Synopsis
• Spice
• More for validation
• Cadence Pearl
• Mentor Graphics SST Velocity

7
Further Information

• PrimeTime Tutorial 1. Introduction to PrimeTime
  and the Tutorial
• Primetime Tutorial
• Have I Really Met Timing? - Validating PrimeTime
  Timing Reports with Spice
• Tobias Thiel
• Proceedings of the Design, Automation and Test
  in Europe Conference and Exhibition Designers
  Forum (DATE04)