Title: TRD Status Report
1TRD Status Report
LHCC Comprehensive Review, 7-8 March 2005,
Johannes P. Wessels Univ. of Muenster
- brief overview
- super module
- insertion tests
- design
- integration of services
- chamber production
- status
- tests
- services
- testbeam
- stack test
- electronics
- analog pre-amplifier shaper
- digital ADC development, tracklet processor
- system integration MCM readout boards
- detector control system
2Transition Radiation Detector (TRD)
- Purpose
- electron ID in central barrel pgt1 GeV/c
- fast trigger for high momentum particles
- Parameters
- 540 modules -gt 760m2 (50 funded)
- length 7m
- anticipated X/X0 15
- 28 m3 Xe/CO2 (8515)
- 1.2 million channels
- Institutions
- Athens, Bucharest, Darmstadt, JINR,
Frankfurt, GSI, PI Heidelberg, KIP Heidelberg,
Cologne, Karlsruhe, Kaiserslautern, Münster, Worms
3General Status Aims
- Bucharest, JINR, GSI, Heidelberg in series
production mode Frankfurt soon ready - incurred additional delay
- modified design of super module - new layer 0
- delay in chip production, redesign of ROB
- still open funding issues
- Japanese proposal for funding resubmitted
- apply to BMBF for funding period 2006-2009
- reschedule with the aim to have
- 1 super module ready in 2005 - installation
Phase 2 - 4 completely equipped super modules -
installation Phase 4
4SM Insertion Tests at CERN
full scaledummy super module insertion
belowTOF dummy August 2004
TOF
TRD
5SM Insertion Tests at CERN
August 2004
6SM Insertion Tests at CERN
Nov./Dec. 2004
Modified Mounting Tool
7SM Insertion Tests at CERN
Nov./Dec. 2004
8Nominal Dimensions of 1 Space Frame Segment
TOF
TRD
9RB 26
BOTTOM / TOP 6 cross bars each LEFT / RIGHT 10
radial bars each
TOP
6
5
4
10
3
9
8
RIGHT
7
2
6
1
5
4
TOP left
TOP right
3
RIGHT top
LEFT top
2
LEFT
TRD
1
RIGHT bottom
LEFT bottom
BOTTOM left
BOTTOM right
BOTTOM
SF-numbering scheme for TRD insertion
test Counting starts on RB 24 side
RB 24
10Nominal Distances/Dimensions between Supermodule
and Space Frame
In the above table the values for LEFT and RIGHT
are valid for segment 04 and 13, assuming the
supe rmodule is centered in the space frame
sector. for segment 05 to 12 LEFT(top and bottom)
0 and RIGHT(top and bottom) 12.46 for segment
14 to 03 LEFT(top and bottom) 12.46 and
RIGHT(top and bottom) 0
11Sector 15, corrected data, ?H9mm
(-?H)
(?H)
(-2?H sin 10)
12Summary of Insertion Tests
-
-
-
-
-
-
-
fits
- does not fit
-
-
-
-
-
-
-
13Solution to the Dilemma
After considering all options
- TOF unchanged
- SF unchanged
- ? modify TRD (shrink by 4)
- do not build L6
- move L1-L5 up by one layer
- introduce new layer (L0) at the bottom
- gain 20 mm on either side
14Space Frame TOF TRD TRD modified
TOF
L5
L4
L3
L2
L1
L0
15Chamber Stack L0 L5
Bernd Windelband, Uni Heidelberg
16Super Module Design
after decision to introduce L0 detailed design
work on the super module has started
17Status of ServicesBus Bar / Cooling Channel
original version
18Status of ServicesBus Bar Version 1
copper bus bars
cooling
Bernd Windelband, Uni Heidelberg
19Status of ServicesBus Bar Version 2
20Servicesnext steps
- final design and construction of new bus bar /
- cooling channel
- design of manifolds (gas and cooling)
- fully equipped ROB with cooling and all cables
21Status HV
Athens
- prototype development progressing - expect 1st
card in summer - working on
- fault protection
- current measurement
- layout
22Radiator
Muenster
- CF-laminated quilt structure of
- thin CF laminate
- Rohacell HF71
- polypropylene fibers from Freudenberg LRP375BK -
completely cut for 100 of TRD - status production completed in July 04
- layer 0 - try modification of L6
- order extra panels
23QA - Radiators
Muenster
- systematic check of X-ray absorption of HF71/CF
laminate - Test device
- 10 kV X-ray source from Dubna
- source up to 50 keV
- Si/Li detector
- measurement of individual componenets and whole
radiators
24Radiator X-ray absorption
Muenster
- quantitative understanding of absorption
properties of all materials over large energy
range - parameterizationOrlic et al. NIM B74(93)352
25Chamber Design
- HEXCELL/CF backing (FACC)
- finished - layer 0 ordered
- pad plane - (Optiprint) finished
- layer 0 delivery in April
- amplification region
- drift region
- radiator
26Chamber Assembly
Heidelberg
27TRD chamber production
Heidelberg
preparation of side profiles
preparation for high voltage and gas tightness
test
control of wire grid
28Quality Assurance
- common set of tools developed and adopted by
all production sites - standardized assembly procedure with sign-off
sheet training in Heidelberg - gas tightness better than 1 mbar l/h
- (lt0.2 mbar l/h in preproduction)
- dark current lt 1 nA _at_1.5 kV
- gain uniformity lt 15
- wire tension 5
29Chamber Assembly
Heidelberg
30Chamber Testing
Heidelberg
2d - gain map
JINR X-ray source
phi
z
test of leak tightness
10
O2 level (ppm)
anode current vs. position
time
31Wire Tension Position Device
contact-free wire tension and position measurement
step motor
bar code head
chamber
32Wire Tension Position Device
as delivered to Heidelberg and Bucharest
33Wire Tension Measurement
Tension
Tension
45.9 0.1 cN nominal 45 cN
76.4 0.05 cN nominal 80 cN
34Wire separation
Anode
Cathode
5 mm 28 µm
2.5 mm 46 µm
35Clean Rooms at JINR
36Wire Frame Transfer
JINR
Several microscopes are used to define a right
wire position relatively to reference hole ,
precision 50 mkm
TRD status meeting, 3-5 January 2005, GSI
37Gain Uniformity Measurement
JINR
38Status JINR
- 13 chambers ready and tested
- gain uniformity about 14
- 2 chambers under transferring of anode planes
- 4 boxes and 19 pad plane panels are ready
- will finally need 8 days for 2 chambers
- (as of February 4)
-
cosmic trigger for super module test under
preparation
39Status of Bucharest Lab
laboratory fully operational
40(No Transcript)
41Heidelberg Status
- manpower
- 2 technicians (chamber building)
- 1 student (pad plane QA, chamber production)
- 3 technicians (front- L-profiles production)
- 1 technician from Bucharest (L-profiles
production) - 2 physicists
- production rate 1 chamber/week
- (w/o complications)
- 9xL1C1 finished
- 2xL1C1 being wired
- 3xL1C0
- 3xL2C0
- 1xL1C0 not usable? (badly glued pad plane repair
may be possible)
42Layer 0 Implications
- pad plane delivery starting April 05
- back panel delivery starting June 05
- radiators - modify L6, order additional material
- few months delay - implented in schedule
- current distribution of types
- Dubna L1-6C0
- Bucharest L2C1, L3C1
- GSI L5C1, L6C1
- HD L1C1(part), L4C1
- Frankfurt L1C1 (rest), ?
- proposed change
- Dubna L0-5C0
- Bucharest L2C1, L3C1
- GSI L4C1, L5C1
- HD L1C1(part), L0C1
- Frankfurt L1C1(rest), ?
43Chambers until End of 2005
- Hd
- 7 L1C0
- 6 L2C0
- 24 L1C1
- 28 L0C1
- Dubna
- 12 L0C0
- 7 L1C0
- 6 L2C0
- 10 L3C0
- 8 L4C0
- 12 L5C0
- Bucharest
- 2 L1C0
- 2 L2C0
- 20 L2C1
- 20 L3C1
- GSI
- 20 L4C1
- 24 L5C1
- Frankfurt
- 20 L1C1
more than 50 by the end of 2005
44Chambers Ready for Installation in SMs
- - assumption funding commitment for 100
detector Spring 2006 - all estimates based on 1 chamber/week average
production rate - -gt chamber production not limiting super module
assembly
45Gas System Status
- all features tested, including (CERN 04)
- membranes for filling with Xe
- flush with CO2
- inject Xe while pumping out CO2 from membrane
- double regulation system (3rd rack)
- CERN 04 test beam a satisfactory experience
- work needed to automate procedures
46(No Transcript)
47Gas System Schedule
- to be revisited with GWG
- design change in the distribution racks in
preparation - construction schedule to match installation
48Beam Time October 2004
49(No Transcript)
50Test Beam - Event Display
51Test Beam - Charge Spectra
52Test Beam - dE/dx, e/p
quantitative understanding of deposited charge
final electronics on stacksignificantly larger
noise
53Test Beam - Angle Reconstruction
envisaged TRD performance achieved - noise will
be improved detailed understanding in simulation
(space charge, isochronicity) NIM A 540 (2005)
140-157 neural networks for PID, NIM submitted
54TRD Electronics Status and Planning
- Chip production and testing
- PASA
- TRAP
- OASE
- MCM
- Readout Board
- DCS
- Integration
- October tests
- Recent measurements
- Planning
Volker Lindenstruth Chair of Computer Science
Kirchhoff Institute for PhysicsUniversity
Heidelberg, Germany Phone 49 6221 54
9801 Fax 49 6221 54 9809 Email ti_at_kip.uni-heide
lberg.de WWW www.ti.uni-hd.de
55PASA
- full production ordered and delivered in 2004
- all tests performed since then were using
untested chips from production rundue to high
production yield no significant loss - PASA wafer tester produced
- PASA wafer testing to start in March 2004
56Tracklet Processor
- Features
- deep submicron UMC180nm
- integration of 22 ADCs, 4 RISC CPUs, 4x2.5 GBit
Network IFDCS infrastructure, Temperature
sensor, - concurrent operation of processor and ADCs
- Status
- pilot run launched in April 04
- chips returned working with one minor bug
disabling the redundant DCS interface - ADC performance over all 9.5 ENOB
- M2/M3 patched to enable redundant DCS interface
- reprocessed, backordered 4 wafers received Feb
25, 05
57OASE
- OASE (Optical Advanced Serializer/dEserializer)ch
ips on TRAP3 wafer received back DOA (error in
mask fabrication, affecting only TWELL mask) - UMC finally agreed in October to repair mask and
reprocess 4 wafers from scratch - 4 new wafers with OASE chips received Feb 25,
2005(wafers were processed with corrected TRAP
masks, yielding additional 4 wafers for
production) - OASE backup (FPGAglue logic) designed in order
to avoid project delays (OASE serializer is
mounted on mezzanine card)
58MCM Production
FZ Karlsruhe
- fully automatic MCM tester completed being
phased into production - electronics identical for TRAP wafer tester
(needle card under development) - first automatic MCM testing starting at KIP
- several batches of 16x MCM lots produced at FZK
59Readout Board
- first readout boards (V1) produced in September
04 - readout board V1 fully opeational during test
beam - production process requires further optimization
of yield - current profiles measured on V1 and filter caps
optimized readout board redesigned with improved
PWR and GND routing ? V2 - first equipped module V2 received 2/05 testing
started - additional respin anticipated
- use of very low dropout regulators to save power
- adapt to layer 0
60DCS Single Board Linux Computer
- successfully operated in test beam, October 2004
- working fully to specification
- full software stack available and functional
- two minor features / inelegant usage issues found
and repaired - layout patch completed
- second preproduction run ordered (25 units)
- production run of 200 units to follow 5/05 as
needed - no delay for either TPC or TRD as DCS board is
not in critical path - production tester in production
- embedded single-board linux computer
- radiation tested
- ethernet as field bus operational in strong
magnetic fields - very light weight ethernet interface
- redundant, in situ reconfigurable
- emerging ALICE standard
- reconfiguration master
61Test Beam Readout Scheme
1
2
3
4
5
6
0
7
RB
RB
RB
RB
RB
RB
RB
RB
All RoBs V1
TRAP 3 Merger
TRAP 3 Merger
TRAP 3 Merger
FER
- ACEX card last
- minute solution for FER
- FER converts data to DDL
DDL
LVDS
Adapter
HLT PubSub
HLT- RORC
ACEX
62DAQ System setup
TRD LDC
FER
TRD stack
TRAP 3 Merger
DDL
GDC
VME LDC
Switch
Monitoring detectors
PVSS
8 DCS boards
Temp
beam area
counting room
DCS
DCS
DCS
DCS
DCS
DCS
DCS
DCS
63Trigger System Setup
TRD stack
8 DCS boards
Trigger signal
128 TRAP3
DCS
DCS
ev
DCS
DCS
TTCvi
DCS
DCS
DCS
DCS
FER
Trigger fan out
Monitoring detectors
TRD LDC
ev
CORBO
VME LCD
busy
GDC
? entire trigger/clock distribution system
operated
64First Online Tracks (1 of 2)
lt?Ygt 524 ?m
?single track reconstructed by the tracklet
processor on the MCM
65First Online Tracks (2 of 2)
lt?Ygt 233 ?m
lt?Ygt 329 ?m
lt?Ygt 836 ?m
?multiple tracks reconstructed by the tracklet
processor on the MCM
66Test Beam Summary
- first fully operational TRD Stack
- all on-detector electronics components
implemented and tested - tracklet processor and readout working without
any problems - complete readout tree exercised under realistic
experiment conditions (however, at reduced rate
but full bandwidth due to ACEX readout mode) - full DCS functionality with 10 DCS boards working
fine - complete TTC Trigger System implemented
- TRD not used as trigger but verified in data
- 600k events recorded in 7 days, trigger rate 25
Hz - noise in test beam area very high due to various
possible reasons (very preliminary grounding, 80
unused pads, first version of complete
electronics chain, uncontrolled current returns)
noise about 6000 e-
67Readout Board Topology
V1
68Optimization of RoB (V1)
- one readout board V1.0 on Stand alone chamber
- connected to stack power
- HV unconnected
- gas system unconnected
69RoB V2.0 in Lab
70Integration Summary
- electronics noise of stand-alone MCM 600e- RMS
- electronics noise of stand-alone RoB V1 700e-
RMS - electronics noise of stand-alone chamber 1200e-
RMS - electronics noise of chamber in stack 1500e- RMS
- various issues identified and being repaired
- improvement of grounding (e.g. ethernet, readout,
HV, chamber) - improvement of systematic cross talk (trigger
related cross talk, most likely via digital
power) - improvement of power filtering
- better understanding of RLC properties of power
distribution
71Power
- power measured in system
- power increase as compared to original estimate
- some heat dissipation compensated with very LDO
regulators in latest RoB design - cable and rack allocation being reworked
PASA 3.3V Heat per SM W Heat W Vdrop V Heat W
Analog 281.77 20723.47 0.40 2511.94
TRAP 3.3V Â Â Â Â
 20.97 5653.14 0.40 685.23
TRAP 1.8V Â Â Â Â
Analog 475.19 14679.45 0.60 4893.15
TRAP 1.8V Â Â Â Â
Digital 414.43 13708.82 0.30 2284.80
DCS 3.3V Â Â Â Â
Digital  237.60 0.40 28.80
Sum    Â
 1192.35 55002.48  10403.9176
    Total Heat W
    66598.75
72Detector Summary
- construction of TRD moving steadily ahead
- 5 sites working on chamber production
- space constraints with space frame resolved
- introduction of new layer 0
- slight increase in cost
- major goal - finish first super module this year
- funding commitment for 100 desirable inearly
2006
73Electronics Summary
- significant progress on electronics in 2004
- design of all electronics completed, tested and
verified - 8 wafers of digital chips deliveredproduction
launch of digital chip wafers during March/April
05 - production test infrastructure approaching
completion - complete electronics, DCS, and trigger
infrastructure successfully operated during beam
time - noise and performance of stand-alone readout
board satisfactory - still some yield issues with glob top of MCMs
- readout board production not yet running smoothly
- remaining issues
- noise performance of electronics on chamber still
not optimal - full integration of a super module
74Milestones
- readout board start of production 7/05
- digital chip complete 7/05
- MCM complete 11/06
- readout board complete 12/06
- GTU start production 6/06
- GTU complete 1/07
- chambers 50 complete 12/05
- chambers 100 complete 10/06
- start stacking super modules 11/05
- super modules complete 6/07
- ready to install 1 super module 5/06
- start installation 1 super module 6/06
- end installation 1 super module 7/06
- ready to install 9-1 super modules 8/07
- start installation 9-1 super modules 3/07
- end installation 9-1 super modules 1/08
- TRD 50 installed 3/07
- TRD 100 installed 1/08