CEG3470

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CEG3470
Digital Circuits (Spring 2009)
Lecture 1 Introduction
Courtesy slides from DIC 2/e and EE141 notes
from Prof. Jan Rabaey

• Tang Wai Chung, Matthew

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Course Information

• Lecturer
• Tang Wai Chung, MatthewSHB 106, 3163-4258,
  wctang_at_cseOffice Hours Thursday 2 4 p.m.
• Tutor
• Yu HaileSHB 1024, hlyu_at_cseOffice Hours TBD
• Webpage
• http//www.cse.cuhk.edu.hk/ceg3470

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Class Organization / Grading
Theoretical questions calculations, designs and
discussions.
Medium-size design with layout report
Covers all class materialsHW, lab, proj and
midterm
Practical workouts layouts, verifications
simulations
Week 8 1st half of the course
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Important Announcements

• Please use the newsgroup for asking questions
• news//news.cse.cuhk.edu.hk/cuhk.cse.ceg3470
• Webnews available at webpage
• Project is done in pairs
• No late homework/labs
• Solutions available shortly after due time/date
• Never think about plagiarism or cheating

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Class Material

• Textbook Digital Integrated Circuits A Design
  Perspective", 2nd edition, by Jan Rabaey,
  Anantha Chandrakasan and Borivoje Nikolic
• Lecture notes webpage
• Tutorial notes/lab specs webpage
• Check webpages for various tools for this course

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Course Webpage

• The sole source of information
• http//www.cse.cuhk.edu.hk/ceg3470
• lecture notes
• homework and solutions
• tutorial notes
• lab specs and project information
• exams
• Many other goodies

Print only what you need Save a tree!
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Software

• MAGIC
• The best academic layout tools
• Assist your layout drawing
• Handle extraction for simulations or tape-out
• IRSIM
• Logic-level simulations
• Fast estimations on correctness and speed
• SPICE
• Model-based simulations
• Slower, but more accurate and reliable result

Tutor will teach you how to use the tools in
details. Do attend tutorials!
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What is Digital Circuits?

• List 10 GOOD points about DC
• Work in groups of 4-5
• Time allowed 10 minutes

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What is this class all about?

• Introduction to digital integrated circuit design
  engineering
• will describe models and key concepts needed to
  be a good digital IC designer
• Models allow us to reason about circuit behaviour
• Allow analysis and optimization of the circuits
  performance, power, cost, etc.
• Understanding circuit behaviour is key to making
  sure it will actually work
• Teach you how to make sure your circuit works
• Do you want your transistor to be the one that
  screws up a 1 billion transistor chip?

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Detailed Topics

• CMOS devices and manufacturing technology
• CMOS gates
• Combinational and sequential circuits
• Interconnect
• Memories
• Propagation delay, noise margins, power
• Timing and clocking
• Design methodologies

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What will you learn?

• Understanding, designing, and optimizing digital
  circuits for various quality metrics

Performance (speed)
Power dissipation
Cost
Reliability
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Introduction

• Digital Integrated Circuit Design the past, the
  present and the future
• What made digital IC design like what it is
  today?
• Why is designing digital ICs different today than
  it was before?
• Will it change in the future?

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The First Computer
The Babbage Difference Engine (1832) 25,000
parts Cost ?17,470
See More http//en.wikipedia.org/wiki/Difference_
engine
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ENIAC - The first electronic computer (1946)
See More http//en.wikipedia.org/wiki/Eniac
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The Transistor Revolution
First transistor Bell Labs, 1948
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The First Integrated Circuits
Bipolar logic 1960s
ECL 3-input Gate Motorola 1966
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Intel 4004 Microprocessor
Intel, 1971. 2,300 transistors (12mm2) 740 kHz
operation (10µm PMOS technology)
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Intel Pentium 4 Microprocessor
Intel, 2005. 125,000,000 transistors
(112mm2) 2.8 GHz operation (90nm CMOS technology)
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Intel Atom Microprocessor
Intel, 2008. 47,000,000 transistors (25mm2) 1.8
GHz operation 0.6-2.5 Watt (vs. 35-watt in Core
2 Duo) (45nm hi-k metal gate CMOS technology)
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Moores Law

• In 1965, Gordon Moore noted that the number of
  transistors on a chip doubled every 18 to 24
  months.
• He made a prediction that semiconductor
  technology will double its effectiveness every 18
  months.

Gordon E. Moore, co-founder of Intel
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Moores Law (Cont)
Courtesy Intel
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Evolution in Complexity
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Moores law in Microprocessors
Transistors on Lead Microprocessors double every
2 years
Courtesy Intel
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Die Size Growth
Die size grows by 14 to satisfy Moores Law
Courtesy Intel
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Frequency
Lead Microprocessors frequency has been doubleing
every 2 years but is now slowing down. Why?
Courtesy Intel
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Power Dissipation Prediction (2000)
Power delivery and dissipation will be prohibitive
Courtesy Intel
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Power density
10000
Suns Surface
Rocket Nozzle
1000
Nuclear reactor
Power Density (W/cm2)
100
8086
10
4004
P6
8008
Pentium proc
8085
386
286
486
8080
1
1970
1980
1990
2000
2010
Year
Power density too high to for cost-effective
cooling
Courtesy Intel
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Not enough cooling
From http//www.tomshardware.com/reviews/hot-spot
,365-5.html
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Why Scaling?

• Technology shrinks by 0.7/generation
• With every generation can integrate 2x more
  functions per chips chip cost does not increases
  significantly
• Cost of a function decreases by 2x
• But...
• How to design chips with more and more functions?
• Design engineering population does not double
  every two years
• Hence, a need for more efficient design methos
• Exploit different levels of abstraction

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Not Only Microprocessors
Mobile Phone
Small Signal RF
Power RF
Digital Cellular Market (Phones Shipped)
Power Management
Analog Baseband
Digital Baseband
Courtesy Texas Instruments
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Challenges in Digital Design

• Microscopic Problems
• Ultra-high speed design
• Interconnect
• Noise, Crosstalk
• Reliability, Manufacturability
• Power Dissipation
• Clock distribution.
• Everything Looks a Little Different

Macroscopic Issues Time-to-Market
Millions of Gates High-Level Abstractions
Reuse IP Portability Predictability
etc. and Theres a lot of them!
?
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Productivity Trends
Complexity outpaces design productivity
Courtesy ITRS Roadmap
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Design Abstraction Levels
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Coming up

• Basic metrics for design of integrated circuits
  how to measure cost, delay, power, etc.