Arithmetic Circuits I

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Arithmetic Circuits I
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Iterative Circuit

• Like a hierachy, except functional blocks per bit

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Adders

• Great example of this type of design
• Design a 1-bit adder circuit, then expand to
  n-bit adder
• Look at
• Half adder which is a 2-bit adder, no carry in
• Inputs are bits to be added
• Outputs result and possible carry
• Full adder includes carry in, really a 3-bit
  adder

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Half Adder

• S X ? Y
• C XY

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Full Adder

• Three inputs. Two are operand bits, third is Cin
• Two outputs sum and carry

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K Map for S

• What is this?

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K Map for C
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Two Half Adders (and an OR)
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Ripple-Carry Adder

• Straightforward connect full adders
• Chain carry-out (C4) to carry-in of FA of bits A4
  B4
• C0 in case this is part of larger chain, maybe
  just set to zero

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Hierarchical 4-Bit Adder

• We can easily use hierarchy here
• Design half adder
• Use in full adder
• Use full adder in 4-bit adder

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Carry Lookahead Adder

• Note that add itself is just a 2 gate levels
  function
• Idea is to separate carry from adder function
• Then make carry approx 2-level all way across
  larger adder

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Four-bit Ripple Carry
Reference
Adder function separated from carry
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Propagate

• The Pi signal is called propagate for stage i
• Pi Ai ? Bi
• Pi high means stage i propagates incoming carry
  Ci to stage i1

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What Does This Mean(Pi active) ?

• No carry generated in stage i
• So the propagate signal indicates that incoming
  carry should pass on

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Generate

• The Gi is generate
• Its Gi AiBi, so new carry created
• So its ORed with propagated incoming carry

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Said Differently

• If Ai ? Bi AND theres incoming carry, carry will
  be propagated
• Si will be 0, of course
• If AiBi, then a carry is generated
• Incoming carry value will determine whether Si is
  0 or 1

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Carry Lookahead (continued)

• In the ripple carry adder
• Gi, Pi, and Si are local in each cell of the
  adder
• Ci is also local in each cell
• In the carry lookahead adder, in order to reduce
  the length of the carry chain, Ci is changed to a
  more global function spanning multiple cells
• Defining the equations for the Full Adder in term
  of the Pi and Gi

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Ripple Carry Delay 8 Gates
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Carry Lookahead Functions

• C1 G0 P0 C0
• C2 G1 P1 C1
• Substitute the expression of C1 in the equation
  for C2
• C2 G1 P1 ( G0 P0 C0 )
• C2 G1 P1 G0 P1 P0 C0

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Carry Lookahead Functions (continued)

• C2 G1 P1 G0 P1 P0 C0
• For C3
• C3 G2 P2 C2
• C3 G2 P2 (G1 P1 G0 P1 P0 C0 )
• C3 G2 P2 G1 P2 P1 G0 P2 P1 P0 C0
• C4 G3 P3 G2 P3P2 G1
• P3P2 P1 G0 P3P2 P1 P0 C0

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Carry Lookahead Functions Summary

• C1 G0 P0 C0
• C2 G1 P1 G0 P1 P0 C0
• C3 G2 P2 G1 P2 P1 G0 P2 P1 P0 C0
• C4 G3 P3 G2 P3P2 G1
• P3P2 P1 G0 P3P2 P1 P0 C0

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Ripple Carry Delay 8 Gates
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Carries Produced In Two Gate Delays

• Two gate delays after Pi and Gi in all stages
  are generated (one gate delay)

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C1 Just Like Ripple Carry
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C2 Circuit Two Levels
G1 P1 G0
P1 P0 C0
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C3 Circuit Two Levels
P2 P1 G0
G2 P2 G1
P2 P1 P0 C0
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What Happens as Scale Up?

• Can I realistically make 64-bit adder like this?
• Have to AND 64 propagates and C0!
• Compromise
• Hierarchical design
• More levels of gates

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Remember C4

• C4 G3 P3 G2 P3P2 G1
• P3P2 P1 G0 P3P2 P1 P0 C0
• C4 G0-3 P0-3 C0

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Making 4-Bit Adder Module

• Create propagate and generate signals for whole
  module

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Group Propagate

• Make propagate of whole 4-bit block
• P0-3 P3P2P1P0

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Group Generate

• Make Generate of whole 4-bit block
• Indicates carry generated in block

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Hierarchical Carry
A
B
4-bit adder
S
G
P
Cin
C4
C8
Look Ahead
C0

• lookahead block is exercise for you

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Binary Subtraction

• Example
• (19)10 (30)10 - (11)10
• (10011)2 - (11110)2 - (01011)2
• Well use unsigned subtraction to motivate the
  use of
• complemented representation of signed numbers

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Example
If no borrow, then result is non-negative
(minuend gt subtrahend).
Borrow 1 1 1 0 0
Minuend, 1910 1 0 0 1 1
Subtrahend, 3010 - 1 1 1 1 0
Difference 1 0 1 0 1
Correct Dif, -1110 - 0 1 0 1 1
Since there is borrow, result must be
negative. The result must be corrected to a
negative number.
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Correcting Result of Example

• What, mathematically, does it mean to borrow?
• If borrowing at digit i-1 you are adding 2i

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Correcting Result (continued)

• If there is a borrow, M is minuend and N
  subtrahend, the Difference was
• 2n M N
• What we want is magnitude of N-M with minus sign
  in front
• Can get the magnitude of the result (i.e. N - M )
  by subtracting previous result from 2n
• N - M 2n (2n M N)

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Algorithm to Compute M - N

• Subtract N from M
• If no borrow, then M ? N and result is OK
• Otherwise, N gt M
• get the magnitude of the result
• N - M 2n (2n M N)
• Add minus before the magnitude
• Result is (N-M)

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Design of Subtract Ciruit

• Could build a circuit to implement the previous
  algorithm but it will be expensive

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Using 2s 1s Complement Representation of
Signed Numbers

• People use complemented interpretation for signed
  numbers
• 2s complement
• 1s complement

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1s Complement

• Given binary number N with n digits
• 1s complement defined as
• (2n 1) - N
• Note that (2n 1) is a number with n bits, all
  of them 1
• For n 4, (2n 1) 1111

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Example Find 1s Complement of N 1011001
2n - 1 1 1 1 1 1 1 1
- N 1 0 1 1 0 0 1
1s Compl. 0 1 0 0 1 1 0

• Notice that 1s complement is complement of each
  bit

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2s Complement

• Given binary number N with n digits
• 2s complement defined as
• 2n N for N ? 0
• 0 for N 0
• Note that, since 1s complement is (2n 1) - N
• 2s complement is just a 1 added to 1s complement

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Important Property

• Complement of a complement generates original
  number

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New Algorithm for Computing M-N

• Add 2s complement of N to M
• This is M (2n N) M N 2n
• If M ? N, will generate carry
• Discard carry
• Result is positive M - N
• If M lt N, no carry
• Take 2s complement of result
• 2n - M N 2n N-M
• Place minus sign in front - (N-M)

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Example 1

• X 8410 101 0100
• Y 6710 100 0011
• X Y 1710 001 0001
• X gt Y

M gt N Carry generated Discard carry Result is
positive M - N
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Algorithm for Computing X - Y

• Add 2s complement of Y to X
• This is X (2n Y) X Y 2n
• X ? Y, will generate carry
• Discard carry
• Result is positive X - Y

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Example 1 (continued)

• X 101 0100 minus Y 100 0011
• 2s comp Y ( 011 1100 ) 1 011 1101

X 1 0 1 0 1 0 0
2s comp Y 0 1 1 1 1 0 1
Sum 1 0 0 1 0 0 0 1
M gt N Carry generated Discard carry Result is
positive M - N
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Example 2

• Y 6710 100 0011
• X 8410 101 0100
• Y lt X
• Y - X - 1710

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Algorithm for Computing Y - X

• Add 2s complement of X to Y
• This is Y (2n X) Y X 2n
• Y lt X, no carry
• Take 2s complement of result
• 2n - Y X 2n X-Y
• Place minus sign in front - (X-Y)

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Example 2 (continued)

• Y 100 0011 minus X 101 0100
• No end carry
• Answer - (2s complement of Sum)
• - 0010001

Y 1 0 0 0 0 1 1
2s comp X 0 1 0 1 1 0 0
Sum 1 1 0 1 1 1 1
We said numbers are unsigned. What does this
mean? How is -1710 represented?
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Adder-Subtractor

• Need only adder and complementer for input to
  subtract
• Need selective complementer of output to make
  negative output from 2s complement of Sum

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Design

• Output is result if A gt B Discard carry
• Output is 2s complement of result if B gt A

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Signed Binary

• First review signed representations
• Signed magnitude
• Left bit is sign, 0 positive, 1 negative
• Other bits are number
• 2s complement
• 1s complement

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Example in 8-bit byte

• Represent -910 -(0000 1001) in different ways
• Signed magnitude of - (0000 1001) is
• 1000 1001
• Signed 1s Complement of - (0000 1001) is
• 1111 0110
• Signed 2s Complement of - (0000 1001) is
• 1111 0111

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Observations (assume 4-bit numbers)

• 1s C and Signed Mag have two zeros
• 2s C has more negative numbers than positive
• All negative numbers have 1 in highest-order bit

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Advantages/Disadvantages

• Signed magnitude has problem that we need to
  correct after subtraction
• Ones complement has a positive and negative zero
• Twos complement is most popular
• Arithmetic operations easy

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Twos Complement

• Addition easy on any combination of positive and
  negative numbers
• To subtract
• Take 2s complement of subtrahend B to produce -B
• Add to A
• This performs A ( -B), same as A B

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Examples

• Assume we use 2s complement representation of
  signed numbers and store each number in 8 bits
• 6 (0000 0110) 13 (0000 1101)
• -6 (1111 1010) -13 (1111 0011)
• Addition
• 6 13
• -6 13
• 6 (- 13)
• (-6) (-13)
• Subtraction
• -6 - (-13)
• 6 - (- 13)

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Overflow

• Two cases of overflow for addition of signed
  numbers
• Two large positive numbers overflow into sign bit
• Not enough bits for result
• Two large negative numbers added
• Same not enough bits
• Carry out can be OK

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Examples

• Assume we use 2s complement representation of
  signed numbers and store each number in 4 bits
• 7 7
• -7 -7
• 4 4
• Generates no carry, but overflowed (i.e. result
  is NOT OK)
• 7 7
• Generates carry but result OK

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Overflow Detection

• Condition for overflow
• either Cn-1 or Cn is high, but not both
• 4 4 only Cn-1 is high overflow
• 7 7 Cn-1 Cn are high no overflow