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Photonic on Silicon Electro-optical links for
massively parallel multiprocessors
systems-in-package
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Electro-optical links for massively parallel
multiprocessors SiP

• Background

1965, General Electric GE635, reportedly 1st SMP
computer, with 4 processors, up to 2 MIPS
2012, IBM Sequoia BlueGene/Q, with 1.5 M cores,
20 PFLOPS, 7.8 MW. Optical fiber cables, arranged
in a 5D-torus network at node board (32 cards)
level .
Electro-Optical Links will support
next-generation HPC and smart embedded systems
Optical links at chip-to-chip level
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Electro-optical links for massively parallel
multiprocessors SiP

• Current Leti Research Carnot Hubeo

Multiple access link, shared optical bus
Demo 1 (mid term) Complete electro-optical link
8GB/s Demo 2 (long term) Multicore RAM
optical link architecture
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Project Idea Electro-optical links for massively
parallel multiprocessors SiPEU call
Contact Joseluis.gonzalezjimenez_at_cea.fr
Project Idea short description Development of
new chip-to-chip communication, based on
electro-optical links

• Short Description
• Co-optimization of optics and electronics
  components.
• Non-classical optical receiver transmitter
  architectures (small form factor).
• Optical Multi-level AM Modulation.
• Optical clock distribution and synchronization.
• And other topic for other applications
• Optical generation of ultra-low phase noise mmW
  signals (Backhaul High order modulation).
• Potential Applications
• High Power Computing
• Embedded Systems
• 5G
• Competences needed
• Low power Wide Band analog design (up to 25GB/S)
  for data communication on 28nm and beyond.
• Actives and passives components models on 28nm
  and beyond.
• Electro-optical modeling and simulation.
• Heterogeneous integration.